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上传时间: 2020-03-09
详细说明：LPDDR4/LPDDR4X SDRAM,MT53E256M16D1, MT53E256M32D2,LPDDR4/LPDDR4X SDRAM
MT53E256M16D1, MT53E256M32D2
Features
This data sheet is for LPDDR4 and LPDDR4X unified
product based on LPDDR4X information. Refer to
LPDDR4 setting section LPDDR4 1.10V VDDQ at the
end of this data sheet.
• Ultra-low-voltage core and I/O power supplies
– VDD1 = 1.70–1.95V; 1.80V nominal
– VDD2 = 1.06–1.17V; 1.10V nominal
– VDDQ = 1.06–1.17V; 1.10V nominal
or Low VDDQ = 0.57–0.65V; 0.60V nominal
• Frequency range
– 1866–10 MHz (data rate range: 3733–20 Mbps/
pin)
• 16n prefetch DDR architecture
• 8 internal banks per channel for concurrent operation
• Single-data-rate CMD/ADR entry
• Bidirectional/differential data strobe per byte lane
• Programmable READ and WRITE latencies (RL/WL)
• Programmable and on-the-fly burst lengths (BL =
16, 32)
• Directed per-bank refresh for concurrent bank operation
and ease of command scheduling
• Up to 8.5 GB/s per die
• On-chip temperature sensor to control self refresh
rate
• Partial-array self refresh (PASR)
• Selectable output drive strength (DS)
• Clock-stop capability
• RoHS-compliant, “green” packaging
• Programmable VSS (ODT) termination
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