UART参考设计，带16byte缓冲 VHDL代码 xapp223 These small UART transmitter and receiver macros of just 7 and 8 Virtex CLBs respectively provides all the functionality of a standard UART together with internal 16-byte FIFO buffers. UART_TX and UART_RX version 1.
This zip file contains the following folders: \vhdl_source -- Source VHDL files: uart.vhd - top level file txmit.vhd - transmit portion of uart rcvr.vhd - - receive portion of uart \vhdl_testfixture -- VHDL Testbench files. This files only include t
