The Xilinx® High-Level Synthesis software Vivado® HLS transforms a C specification into a Register Transfer Level (RTL) implementation that synthesizes into a Xilinx Field Programmable Gate Array (FPGA). You can write C specifications in C, C++ or S
This article will explain how to build ZRobot hardware project by Vivado Design Suite, including tutorials about adding user-defined IP, constructing your embedded system, synthesizing and generating bitstreams. At last we will export the project in
