In the realm of FPGAs, many tool vendors offer behaviorally-based simulators aimed at easing the complexity of large FPGA designs. At times, a behaviorally-modeled design does not work in hardware as expected or intended. VTsim, a Virtex-II device s
The Virtex-6 FPGA Memory Interface Solutions User Guide provides information about using, customizing, and simulating LogiCORE™ IP DDR2 or DDR3 SDRAM, QDRII+ SRAM, and RLDRAM II memory interface cores for the Virtex®-6 FPGA.
Industry First Radiation Hardened Platform FPGA Solution Guaranteed total ionizing dose to 200K Rad(Si) 2 Latch-up immune to LET > 160 MeV-cm /mg SEU in GEO upsets < 1.5E-6 per device day achievable with recommended redundancy implementation C
针对实时操作系统的开销导致应用程序可执行性降低的问题，提出了基于FPGA的硬件实时操作系统设计方案，并实现了μC/OS-II任务管理模块的硬件化。通过设计基于片内寄存器的TCB及基于组合电路的任务调度器，充分发挥了多任务潜在的并行性。整个设计采用VHDL硬件描述语言，通过ISE 8.2软件进行时序仿真验证，并使用Xilinx公司的Virtex-II Pro FPGA板实现。
