timescale 1ns 10ps module dec fit clk4x hsin vsin rin gin bin cntrl yout p uout p vout p yout n uout n vout n hsout vsout tout clk2x clk1x ; input clk4x clk2x clk1x; input [7:0] rin gin bin; input hsin vsin; input [8:0] cntrl; output [7:0] yout p uo