英文版 版本日期：Revision of JESD204B, July 2011 This specification describes a serialized interface between data converters and logic devices. It contains normative information to enable designers to implement devices that communicate with other devices co
► General Link Debugging Guidelines § Process overview § Detecting where synchronization between the JESD204B transmitter (JTX) and receiver (JRX) failed ► HAD Products § Device-specific link startup requirements § Platform board (FPGA) features and
