Writing Testbenches using System Verilog 英文原版的，学起来比较容易。 Writing Testbenches using System Verilog About the Cover xiii Preface xv Why This Book Is Important . . . . . . xvi What This Book Is About . . . . . . . . xvi What Prior Knowledge You Should H
Contents Acknowledgments x Author Biography xi Chapter 1: Defining the Obvious 3 What Is ‘the Obvious’? 6 Qualities of a great application 8 How Do You Design the Obvious? 10 Turn qualities into goals 10 The Framework for Obvious Design 12 Know what
