文件名称:
Digital VLSI Design with Verilog
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文件大小: 12mb
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上传时间: 2010-11-28
详细说明： Verilog and its usage has come a long way since its original invention in the mid-80s by Phil Moorby. At the time the average design size was around ten thousand gates, and simulation to validate the design was its primary usage. But between then and now designs have increased dramatically in size, and automatic logic synthesis from RTL has become the standard design flow for most design. Indeed, the language has evolved and been re-standardized too. Over the years,many books have been written about Verilog.My own, coauthored wit h Phil Moorby, had the goal of defining the language and its usage, providing ex- amples along the way. It has been updated with five new editions as the language and its usage evolved. However this new book takes a very different and unique view; that of the designer. John Michael Williams has a long history of working and teaching in the field of IC and ASIC design. He brings an indepth presentation of Verilog and how to use it with logic synthesis tools; no other Verilog book has dealt with this topic as deeply as he has. If you need to learn Verilog and get up to speed quickly to use it for synthesis, this book is for you. It is sectioned around a set of lessons including presentation and explanation of new concepts and approaches to design, along with lab sessions. The reader can follow these at his/her own rate. It is a very practical method to learn to use the language, one that many of us have probably followed ourselves. Namely, learn some basics, try them out, and continually move on to more advanced topics which will also be tried out. This book, based on the author’s experience in teaching Verilog, is well organized to support you in learning Verilog. ...展开收缩
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