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Matlab锁相环路代码phaselockedloopPLL-pll.m
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上传时间: 2019-08-13
详细说明： Matlab锁相环路代码phaselockedloopPLL-pll.m A phase-locked loop or phase lock loop is a control system that generates a signal that has a fixed relation to the phase of a "reference" signal. The predecessor to the modern phase-locked loop was first described in 1932 by Henry de Bellescise. A phase-locked loop circuit responds to both the frequency and the phase of the input signals, automatically raising or lowering the frequency of a controlled oscillator until it is matched to the reference in both frequency and phase. A phase-locked loop is an example of a control system using negative feedback. 提示：附件所在地址（https://www.ilovematlab.cn/thread-3198-1-1.html） Phase-locked loops are widely used in radio, telecommunications, computers and other electronic applications. They may generate stable frequencies, recover a signal from a noisy communication channel, or distribute clock timing pulses in digital logic designs such as microprocessors. Since a single integrated circuit can provide a complete phase-locked-loop building block, the technique is widely used in modern electronic devices, with output frequencies from a fraction of a cycle per second up to many gigahertz. PLL.gif Author: Edwin Pasterkamp 附件里的代码，里面有详细过程说明： Matlab中文论坛: www.iLoveMatlab.cn
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