ARM Cortex-A(armV7)编程手册V4.0.pdfARM® Cortex™-A7 Ser

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详细说明：ARM® Cortex™-A7 Series Version: 4.0 Programmer’s Guide This Cortex-A Series Programmer’s Guide is protected by copyright and the practice or implementation of the information herein may be protected by one or more patents or pending applications.Contents ARM Cortex-A Series Programmer's Guide Preface Preface to the 4th edition 11 Typographical conventions Feedback on this book ∴XV References Chapter 1 Introduction History… 1-2 1.2 System-on-Chip(SoC) 1-4 1.3 Embedded systems 15 Chapter 2 ARM Architecture and processors 2.1 Architectural profiles Architecture history and extensions 2-3 2.3 Processor properties 2-8 2.4 Cortex-A series processors 2-10 2.5 Key architectural points of ARM Cortex-A series processors 2-16 Chapter 3 ARM Processor Modes and Registers Registers… 6 Chapter 4 Introduction to Assembly language 4.1 Comparison with other assembly languages 4-2 4.2 The arm instruction sets 4-3 4.3 Introduction to the gnu assembler .4-5 4.4 ARM tools assembly language 4-9 4.5 Interworking 4-11 RM DENO013D Copyright C 2011-2013 ARM. All rights reserved D012214 Non-Confidential ontents 4.6 Identifying assembly code 4-12 Compatibility with ARMV8-A 4-13 Chapter 5 ARM/Thumb Unified Assembly Language Instructions 5.1 Instruction set basi 5.2 Data processing operations “““面 Memory instructions 54 B 5-15 5.5 Saturating arithmetic 5.6 5-17 Chapter 6 Floating-Point 6. 1 Floating-point basics and the IEEE-754 standard aa:a.“:aa 6-2 6.2 VFP support in GCC 6-8 6.3 VFP support in the ARM Compiler 6-9 VFP support in Linux 6-10 6 Floating-point optimizati 6-11 Chapter 7 Introducing NEoN 7.1 SIMD 7-2 NEON architecture overview 7-5 NEON C Compiler and assembler 7-11 Chapter 8 Caches 8.1 Why do caches help? 8-3 8.2 Cache drawbacks 8-4 Memory hierarchy 8-5 8. 4 Cache architecture 8-6 8.5 Cache policies 8.6 Write and Fetch buffers 8-15 8.7 Cache performance and hit rate... .8-16 88 Invalidating and cleaning cache memory .8-17 8.9 Point of coherency and unification..... 8-19 8.10 Level 2 cache controller 8-22 8. 11 Parity and ECC in caches 8-23 Chapter 9 The Memory Management Unit 9 Ial memory 9.2 The translation lookaside buffer 9-4 9.3 Choice of page sizes 9-6 94 First level address translation 9-7 9.5 Level 2 translation tables 9-11 9.6 Memory attribute 9-14 9.7 Multi-tasking and os usage of translation tables 9-17 Chapter 10 Memory Ordering 10 ARM memory ordering model 10.2 Memory barriers... 10-6 10.3 Cache coherency implications 10-11 Chapter 11 Exception Handling 11.1 Types of exception .... 113 11.1.1 Exception priorities…… 111-6 11.2 EXception handling.. 11-10 11.3 Other exception handlers 11-12 11.4 Linux exception program flow 11-14 RM DENO013D Copyright C 2011-2013 ARM. All rights reserved D012214 Non-Confidential Chapter 12 Interrupt Handling 12.1 External interrupt requests…… ,12-2 12.2 The Generic Interrupt Controller 12-7 Chapter 13 Boot code 13 Booting a bare- metal system.……… 13-2 13.2 Configuration 13-6 13.3 Booting Li Chapter 14 Porting 14. Endianness 14-2 4.2 Alignment 14-5 14.3 Miscellaneous c porting issues 14-7 14.4 Porting ARM assembly code to ARMv7-A 14-10 14.5 Porting ARM code to Thumb 14-11 Chapter 15 Application Binary Interfaces 15.1 Procedure call standard 15-2 15.2 Mixing C and assembly code 15-8 Chapter 16 Profiling 16.1 Profiler output Chapter 17 Optimizing Code to Run on ARM Processors 7 Compiler optimizations 172 7.2 ARM memory system optimization 17.3 Source code modifications 17-12 Chapter 18 Multi-core processors 18.1 Multi-processing ARM systems 183 18.2 Symmetric multi-processing 18-5 18.3 Asymmetric multi-processing .18-7 18 4 Het ● 18-8 18.5 Cache coherency… 18-9 18.6 TLB and cache maintenance broadcast 18-13 187 Handling interrupts in an SMP system….… 18-14 18.8 Exclusive acces 18-15 18.9 Booting SMP systems 18-17 18.10 Private memory region... 18-19 Chapter 19 Parallelizing Software 19.1 Amdahl's law 192 19.2 Decomposition methods 193 9. 3 Threading models 19-5 19.4 Threading libraries∴…… 19-6 19.5 Performance issues 199 19.6 Synchronization mechanisms in the Linux kernel 1911 19.7 Profiling in smP systems 19-13 Chapter 20 Power Management 20. 1 Idle management 20-3 20.2 Hotplug… 206 0.3 Dynamic Voltage and Frequency Scal 207 20.4 Assembly language power instructions 20-8 20.5 Power state Coordination Interface Chapter 21 Security 21 Trustzone hardware architecture 21-2 RM DENO013D Copyright C 2011-2013 ARM. All rights reserved D012214 Non-Confidential ontents Chapter 22 Virtualization 22.1 ARMv7-A Virtualization extensions 223 22.2 Hypervisor software 22-6 22.3 Relationship between virtualization and ARM Security Extensions 22. 4 Large Physical Address Extensions 22-10 Chapter 23 big. LITTLE 23. 1 Structure of a big LITTLE system 23-2 23.2 Software execution models in big LITTLE 23-4 23.3 big. LITTLE MP 23-7 234∪ sing big.TLE… 23-10 Chapter 24 Debug 24.1 ARM debug hardware 24-2 24.2 ARM trace hardware 24-4 24.3 Debug monitor 24-7 24.4 Debugging Linux applications 24-8 24.5 DS-5 debug and trace 24-10 Appendix A Instruction Summary A.1 nstruction Summary………………… A-2 Appendix b Tools, Operating Systems and Boards B.1 Linux distributions B.2 Useful tools B-5 B.3 Software toolchains for ARM processors B-7 B.4 ARM DS-5 B-10 B.5 Example platforms… Appendix c Building Linux for ARM Systems C.1 Building the linux kernel C.2 Creating the linux filesystem C-6 C3 Putting it together C-8 RM DENO013D Copyright C 2011-2013 ARM. All rights reserved D012214 Non-Confidential Preface It is estimated that the number of mobile phones in the world will exceed the human population sometime in 2014. It is also estimated that over 90% of all these mobile devices have an Arm processor inside them This book provides an introduction to ARM technology for programmers using ARM Cortex-A series processors conforming to the ARMv7 A architecture. The book is meant to complement rather than replace other ARM documentation available for Cortex-A series processors, such as the ARM Technical reference manuals(trms)for the processors themselves, documentation for individual devices or boards or, most importantly, the ARM Architecture reference Manual(the ARMARM The purpose of this book is to provide a single guide for programmers who want to develop applications for the Cortex-A series of processors, bringing together information from a wide variety of sources that will be useful to both assembly language and C programmers. Hardware concepts such as caches and Memory Management Units are covered, but only where this is valuable to the application writer. We will also look at the way operating systems such as Linux make use of ARM features, and how to take full advantage of the capabilities of the arM processor, in particular writing software for multi-core processors Although much of the content of this book is also applicable to older arm processors it does not explicitly cover processors that implement older versions of the Architecture. The Cortex-R series and M-series processors are mentioned but not described. Our intention is to provide an approachable introduction to the ARM architecture, covering the feature set in detail and providing practical advice on writing both C and assembly language programs to run efficiently on a Cortex-A series processor. This is not an introductory level book. It assumes some knowledge of the C programming language and microprocessors, but not of any ARM-specific background. In the allotted space, we cannot hope to cover every topic in detail. In some chapters, we suggest additional reading (referring either to books or web sites) that can give a deeper level of background to the topic in hand, but in this RM DENO013D Copyright C 2011-2013 ARM. All rights reserved D012214 Non-Confidential Preface book we focus on the ARM-specific detail. We do not assume the use of any particular tool chain. We will mention both gnu and arm tools in the course of the book. We hope that the book is suitable for programmers who have a desktop PC or x86 background and are taking their first steps into the ARM processor based world The first chapters of the book cover the basic features of the ARM Cortex-A series processors An introduction to the fundamentals of the ARM architecture, covering the various registers and modes and some background on individual processors is provided in Chapter 2 and 3 Chapters 4 and 5 provide a brisk introduction to ARM assembly language programming, and assembly language instructions. We look at floating-point and the ARM Advanced SIMD extensions (neon )in Chapters 6 and 7. These chapters are only an introduction to the relevant topics. We then switch our focus to the memory system and look at Caches, Memory Management and Memory Ordering in Chapters 8, 9 and 10. Dealing with exceptions and interrupts are covered in Chapters ll and 12 The remaining chapters of the book provide more advanced programming info Chapter 13 provides an overview of boot code. Chapter 14 looks at issues with porting C and assembly code to the arMv? architecture, from other architectures and from older versions of the arM architecture. Chapter 15 covers the Application Binary Intertace, knowledge of which is useful to both C and assembly language programmers. Profiling and optimizing of code is covered in Chapters 16 and 17. Many of the techniques presented are not specific to the ARM architecture, but we also provide some processor-specific hints Chapters 18 and 19 cover the area of multi-core processors We take a detailed look at how these are implemented by ARM and how you can write code to take advantage of them. Power management is an important part of ARM programming and is covered in Chapter 20. The final chapters of the book provide a brief coverage of the ARM Security Extensions(TrustZone )in Chapter 2l, the ARM Virtualization extensions in Chapter 22, big. LITTLE technology in Chapter 23, and the hardware debug features available to programmers in Chapter 24 Appendix A gives a summary of the available ARM instructions. Appendix b gives a brief introduction to some of the tools and platforms available to those getting started with ARM programming, and Appendix c gives step-by-step instructions for configuring and building Linux for ARM systems RM DENO013D Copyright C 2011-2013 ARM. All rights reserved D012214 Non-Confidential Preface Preface to the 4th edition The ARM architecture continues to evolve. ARM recently announced the arMv& architecture which, although not covered by this book, has influenced its content. Small changes have been made to the ARMv7 instruction set architecture for compatibility reasons. Those changes are included in this version. We have also taken advantage of the opportunity to carry out a general revision of the contents of the guide You will find some sections moved, some extensively rewritten, and some with minor changes Chapters that covered the same areas have been combined The chapter on registers has been largely rewritten to include the effects of the security and virtualization extensions and the introduction of Privilege levels. The chapters on Exception Handling have been consolidated, so that they now tell a coherent story. a similar approach has been applied to multiprocessing and parallelization In all cases what was two chapters is now one, with the contents updated LPAE is now covered in the chapter on Virtualization. The chapter on Tools, Operating Systems and boards has been moved to the appendices, while the chapter on big. LITTLE technology has been extensively revised to keep pace with rapidly changing technology ARM has added another processor to the armv 7 Cortex-A series, and the new Cortex-Al2 processor is covered in this new edition. You will also notice that what we call the devices has changed. Processor now refers to the marketed device, such as the Cortex-A15 processor elsewhere you will find references to cores, and clusters(of cores Somc content that existed in the previous editions of the Cortex"-4 Series Programmer s Guide has been removed. You will notice that the NEON/VFP Appendix and the chapter on Writing NEON Code have been removed. We originally said that the information on Neon would need a book of its own. It now has one, in the form of the ARM NEON Programmer 's guide. Additional information has also been provided in the form of programming hints and tips, for developers using the Cortex-A series processors. While these cannot cover every eventuality that the developer might encounter we hope that the examples included will prove useful The ARM Cortex-A Series Programmer Guide has proved to be a very popular addition to the arm documentation set and now also forms the reference textbook for the aRm accredited Engineer(△△E) examinations RM DENO013D Copyright C 2011-2013 ARM. All rights reserved D012214 Non-Confidential Preface Glossary abbreviations and terms used in this document are defined here AAPCS ARM Architecture Procedure Call standard ABI Application binary Interface ACP Accelerator Coherency Port AEABI ARM Embedded Abl AHB Advanced High-Performance Bus AMba Advanced microcontroller Bus architecture AMP Asymmetric Multi-Processing APB Advanced Peripheral Bus ARMARM The ARM Architecture reference manual ASIC Application Specific Integrated Circuit APSR Application Program Status Register ASID Address Space ID ATPCS ARM Thumb Procedure Call Standard AXI advanced eXtensible interface BE8 Byte Invariant Big-Endian mode BIU Bus Interface Unit BSP Board Support Package BTAC Branch Target Address cache BTB Branch Target Buffer CISC Complex Instruction Set Computer. CP15 Coprocessor 15 System control coprocessor CPSR Current Program Status Register DAP Debug ac Port DBX Direct Bytecode exo DDR Double Data Rate(SDram) DMA Direct me DMB Data Memory Barrier. DPU ata processing Un DS-5 The ARM develo It stud DSB Data Synchronization Barrier. DSP Digital Signal Processing RM DENO013D Copyright C 2011-2013 ARM. All rights reserved D012214 nfidential

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