铁电内存的MCU MB95F203A.pdf铁电内存的MCU MB95F203Apdf,铁电内存的M

文件名称: 铁电内存的MCU MB95F203A.pdf

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详细说明：铁电内存的MCU MB95F203Apdf,铁电内存的MCU MB95F203APRELIMINARY MIB95R203A ■ PRODUCT OVERVIEW Part number MB95R203A Parameter ROM (FRAM) capacity 8 Kbytes RAM capacity 496 bytes Reset output Yes Low voltage detection reset Yes Number of basic instructions 136 instructions Instruction bit length 8 bits CPU function Instruction length 1 to 3 bytes Data bit length 1.8. and 16 bits Minimum instruction execution time 100 ns(at machine clock 10 MHz) Interrupt processing time 0. 9 us(at machine clock 10 MHz) Port General-purpose I/0 ports: 16 CMOS 10: 12, N-ch open drain: 4 Time-base timer Interrupt cycle: 0.256 ms to 8.3 s(at external 4 MHz Reset generation cycle Hardware/software Watchdog timer Main clock at 10 MHz: 105 ms(Min) Subclock CR can be used as the Watch dog source clock Wild registers It can be used to replace three bytes of data Able to transfer data using UART/SIO Variable data length(5/6/7/8-bit), built-in baud rate generator Transfer rate(2400 bps to 125000 bps at 10 MHz), full-duplex transfers with UART/SIO built-in double buffers NRz type transfer format, error detection function LSB-first or MSB-first can be selected Capable of clock synchronous (SlO)or clock asynchronous (UART serial data transfer Transmit and receive master/slave I2C bus Bus function arbitration function transfer direction detection function Start condition repeated generation and detection functions Built-in timeout detection function 6 ch 8/10-bit A/d converter 8-bit or 10-bit resolution can be selected 2 ch Can be configured as a 2 ch x 8-bit timer or 1 ch x 16-bit timer 8/16-bit compound timer Built-in timer function Pwc function Pwm function and capture function Count clock: available from internal clocks (7 types)or external clocks With square wave output 6 ch External interrupt Interrupt by edge detection(Select rising edge/falling edge/both edges) Can be used to recover from standby modes Low voltage interrupt Selectable from 4 kinds of low voltage detection levels Usable as a release function from standby mode (Continued) DS07-12630-1E FUIITSU 3 MB95R203A PRELIMINARY (Continued) Part number MB95R203A Parameter 1 wire serial control On-chip debug Support serial writing.(Asynchronous mode Watch prescaler Eight different time intervals can be selected Non-volatile memory Number of read/ write cycles: 1015 times FRAM Data retention characteristics: 10 years(+55C) Read security function Function to monitor FRAM power supply Standby mode Sleep mode, Stop mode, Watch mode, time-base timer mode Package DIP-24, SOP-20 FUJITSU DS07-12630-1E PRELIMINARY MIB95R203A ■ PIN ASS| GNMENT (TOP VIEW) P12/ECO/DBG NC NC 1 P07/NT07 Vss匚 4 24pin 21 PO6/NTO6/TO01 X1A/PG2 5 (D|P-24 20 P05/INTO5/ANO5/TOOO/HCLK2 XOA/PG1 6 19 P04/INTO4/AN04/ UI/HCLK1/ECO 18 PO3/NTO3/ANO3/UO scLP65匚 8 17 B P02/INTO2/ANO2/UCK ST/PF2 16 PO1/ANO1 To10/P62 10 15 b POO/ANOO NC 14 NC TO11/P63 12*The number of usable pins is 20.13 P64/EC1/SDA (DIP-24P-M07) (TOP VIEW) 20 F P12/ECO/DBG 19 Vss 3 18 P6/NT06/o01 X1A/PG2 20pin PO5/INTOS/ANO5/TOOO/HCLK2 XOA/PG1 5 (SOP-20 16 P04/INTO4/AN04/UI/HCLK1/ECO 6 15 E P03/INTO3/ANO3/UO SCL/P65 7 4 F P02/INTO2/AN02/UCK RST/PF2 13 PO1/ANO1 To10/P62 9 12 POO/ANOO T11P63 10 P64/EC1/SDA (FPT-20P-M09) DS07-12630-1E FUIITSU 5 MB95R203A PRELIMINARY ■ PIN DESCRIPT|ON Pin no O Pin name Circuit Function DIP24SOP20 type XO b Main clock input oscillation pin X1 B Main clock input/output oscillation pin 34567 Power supply pin(GND) PG2/X1A General-purpose O port This pin is also used as sub clock input/output oscillation pin PG1/XOA General-purpose l/O port This pin is also used as Sub clock input oscillation pin 6 Power supply pin 8 P65/SCL General-purpose 10 port This pin is also used as l2c clock I/O PF2/RST General-purpose I/O port A This pin is also used as reset pin General-purpose 1O port pr 10 P62/o10 High current port This pin is also used as 8/16-bit compound timer ch 1 output General-purpose I/O port 12 10 P63/O11 D High current port This pin is also used as 8/16-bit compound timer ch 1 output General-purpose lo port 3 P64/SDA/EC This pin is also used as l2c data l/O This pin is also used as 8/16-bit compound timer ch 1 clock input 15 12 POO/ANOO E General-purpose 10 port This pin is also used as a/D converter analog input PO1/AN01 General-purpose i/o port 6 This pin is also used as a/d converter analog input General e l0 port P02/INTO2/AN02/ 17 14 This pin is also used as external interrupt input UCK This pin is also used as a/D converter analog input This pin is also used as UART/SIO clock I/O General-purpose l/0 port 18 PO3/INTO3/AN03/ 15 This pin is also used as external interrupt input This pin is also used as A/D converter analog input This pin is also used as UART/SIo data output General-purpose vO port This pin is also used as external interrupt input 19 P04/INTO4/AN04/ UI/HCLK1/ECO F This pin is also used as A/D converter analog input This pin is also used as UART/SiO data input This pin is also used as 8/16-bit compound timer ch o clock input (Continued) 6 FUJITSU DS07-12630-1E PRELIMINARY MIB95R203A (Continued) Pin no Pin name Circuit unction DIP24 SOP20 type General-purpose I/O port High current port 20 17 PO5/INTO5/AN05/ This pin is also used as external interrupt input. TOOO/HCLK2 This pin is also used as a/d converter analog input The pins are also used as 8/16-bit compound timer ch O output. This pin is also used as the external clock input General-purpose I/O port 18 P06/INTO6/TO01 G High current port This pin is also used as external interrupt input This pin is also used as 8/16-bit compound timer ch 0 output 19 PO7/INTO7 General-purpose o port This pin is also used as external interrupt input General-purpose /0 port 24 20 P12/ECO/DBG H This pin is also used as dBg input pin This pin is also used as 8/16-bit compound timer cho clock in- t 2.11 NC 14.23 Internal connect pin Be sure this pin is left open For the l/o circuit type, refer to I/O CIRCUIT TYPE DS07-12630-1E FUIITSU MB95R203A PRELIMINARY ■ O CIRCUIT TYPE ype Circuit Remarks A Reset input/Hysteresis input N-ch open drain output Hysteresis input Reset output /Digital output · Reset output B ·Osc| ation circuit DO Clock input High-speed side X1 Feedback resistance: approx 1 MQ2 Hysteresis input Standby control C ·Osci| ation circuit Port select ·Low- speed side R Pull-up control Feedback resistance: approx 10 MQ2 i P-ch P-ch CMOs output Digital output Hysteresis input With pull-up contr N-ch Digital output Standby control Hysteresis input Clock input X1A XOA Standby control Port select Clock input Port select Pull-up contro Digital outp Digital output N-ch Digital outpt Hysteresis input D CMOS output Digital output Hysteresis input Digital output N-ch Standby conti Hysteresis input (Continued) 8 FUJITSU DS07-12630-1E PRELIMINARY MIB95R203A Continued) Tvpe Circuit Remarks E CMOS output Pull-up control R Hysteresis input With pull-up co P-ch igital output Digital outi Analog input A/D control Standby control Hysteresis input CMOS output R Pull-up control Hysteresis input CMOS input Digital output With pull-up control Digital output □ Analog input AD cont Standby contre Hysteresis input CMOS input G CMOS output Pull-up control Hysteresis input With pull-up control P-ch Digital output Digital output Standby contr Hysteresis input H ·N- ch open drain output Hysteresis input Hysteresis input Digital output N-ch open drain output CMOS inpI Digital outp N-ch Hysteresis input -CMOS input Standby control Hysteresis input DS07-12630-1E FUJISU MB95R203A PRELIMINARY I NOTES ON DEVICE HANDLING Preventing Latch-up Care must be taken to ensure that maximum voltage ratings are not exceeded when they are used Latch-up may occur on CMos ICs if voltage higher than Vcc or lower than Vss is applied to input and output pins other than medium -and high-Withstand voltage pins or if higher than the rating voltage is applied between vcc pin and vss pin When latch-up occurs, power supply current increases rapidly and might thermally damage elements Stable Supply Voltage Supply voltage should be stabilized a sudden change in power-supply voltage may cause a malfunction even within the guaranteed operating range of the Vcc power-supply voltage For stabilization, in principle, keep the variation in Vcc ripple(p-p value)in a commercial frequency range (50 Hz /60 Hz not to exceed 10% of the standard vcc value and suppress the voltage variation so that the transient variation rate does not exceed 0. 1 V/ms during a momentary change such as when the power supply is switched Precautions for Use of external clock Even when an external clock is used, oscillation stabilization wait time is required for power-on reset, wake-up from sub clock mode or stop mode Do not use a sample used in program development as mass-produced product 10 FUJITSU DS07-12630-1E

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