STM32 F3产品技术培训-13.DMA模块.pdfSTM32 F3产品技术培训-13.DMA模块

文件名称: STM32 F3产品技术培训-13.DMA模块.pdf

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上传时间: 2019-09-14

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详细说明：STM32 F3产品技术培训-13.DMA模块DMA Features 3 12 independently configurable channels: hardware requests or software trigger on each channel DMA1:7 Channels DMA2:5 Channels Software programmable priorities: Very high, High, Medium or Low(Hardware priority in case of equality) Programmable and Independent source and destination transfer data size: Byte, Halfword or word 3 event flags for each channel: DMA Half Transfer, DMA Transfer complete and dMa Transfer error Memory-to-memory, peripheral-to-memory and memory-to-peripheral transfers and peripheral-to-peripheral transfers Faulty channel is automatically hardware disabled in case of bus access error Programmable number of data to be transferred: up to 65535 Support for circular buffer management life. augmented DMA1 Request Mapping(1/2 Periphera Channel Channel 2 Channel 3 Channel 4 Channel 5 Channel 6 Channel 7 ADC ADC 1 SP SPI RX SPI1 TX SPI2 RX SPI2 TX USART USART3 TX USART3 RX USART1 TX USART1RX USART2 RX USART2 TX 2C 12C2 TX 12C2 RX 12C1 TX 12C1 RX TM1(*) TIM1 CH1 TIM1 CH2 TIM1 CH4 TIM1 UP TIM1 CH3 TIM1 TRIG TIM1 COM TIM2 TIM2 CH3 TIM2 UF TIM2 CH1 TIM2 CH2 TIM2 CH4 TIM3 TIM3 CH3 TIM3 CH4 TIM3 CH1 TIM3 UP TIM3 TRIG TIM4 TIM4 CH1 TIM4 CH2 TIM CH3 TIM UP T|M6/ TIM6 UP DAC () DAC CH1(1) ( Available on STM32F30X only .(1)DMA request mapped on this DMa channel only if the life. augment Corresponding remapping bit is set in the sYSCfG CFGR1 register DMA1 Request Mapping(2/12) Peripherals Channe 1 Channel 2 Channel 3 Channel 4 Channel 5 Channel 6 Channel TIM7/DAC() TIM7 UP DAC CH2 (1) TIM16 TIM16 CH1 TIM16 CH1 TIM16 UP TIM16 UP TIM17 TIM17 CH TIM17 CH1 TIM17 UP TIM17 UP (*)(1) TIM18/ TIM18 UP DAC DAC CH3 channel 3(*) TM19(*) TIM19 CH3 TIM19 CH1 TIM19 CH2 TIM19 UP TIM19 CH4 ( Available on STM32F30X only (x)Available on STM32F37x only (1)DMA request mapped on this dma channel only if the corresponding remapping bit is set in the SYSCFG CFGR1 register life. augmented DMA2 Request Mapping 6 Peripherals Channel1 Channe 2 Channe 3 Channe 4 Channe 5 ADC ADC2 ADC4 ADC2 (1) ADC4 (1) ADC3 SDADC1 SDADC2 SDADC3 SPI3 SPI3 RX SP13 TX UART4() UARTA RX UARTA TX TIM6/DAC TIM6 UP channel 1 DAC CH1 TIM7/DAC TIM7 UP channel 2 DAC CH2 TIM8/DAC TIM8 CH3 TIM8 CH4 TIM8 CH1 TIM8 CH2 TIM8 UP TIM8 TRIG TIM8 COM TIM18/ DAC TIM18 UP channel 3 *x DAC CH3 ()Available on STM32F 30X only (*)Available on STM32F37x only life. augmented Quiz How many dma channels are available in the stm32F3xX How many interrupts can be generated for each channel? Which Channel is able to perform memory to memory transfer? life. augmented STM32 Releasing your creativity 8 小53 Thank you life. augmented

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