文件名称:
JW7715同步整流控制器的规格书.pdf
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详细说明:JW7715同步整流控制器的规格书pdf,1、支持DCM\CrCM,CCM 工作模式
2、适应大部分电源拓扑架构(反激、LLC)
3、快速的驱动能力
4、独特的自适用关断
5、支持高边和你边应用
6、SOT23-6封装15
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ORDER INFORMATION
TOP
Note
LEAD FREE FINISH
TAPE AND REEL PACKAGE
MARKING JWXXXXPPPP#TRPBE
JW7715SOTB#PBFJW7715SOTB#TRPBF
SOT23-6
」WE3
Part Numberge Coand Reel(If"TR"is not shown, it means Tube)
PIN CONFIGURATION
TOP VIEW
6SW
GND 2
5VO
VCCl 3
4MOT
SOT23-6
ABSOLUTE MAXIMUM RATING 1)
SW PIN
80
VO PIN
.30V
VCC. GT PIN
,5V
Maximum Power Dissipation
0.5W
Junction Temperature
150°C
Lead Temperature
260°C
Storage Temperature…
65°Cto150°C
RECOMMENDED OPERATING CONDITIONS
SW Pin
47V to 70V
VO Pin
4.7V to 20V
VCC, GT PIN
4V to 6V
Operation Junction Iemp.
40°to125°
THERMAL PERFORMANCE4
SOT23-6
220..130°C
Note
1)Exceeding these ratings may damage the device
2) TA=25C. The maximum allowable power dissipation is a function of the maximum junction temperature T,(MAX), the
unction-to-ambient thermal resistance AJA, and the ambient temperature TA. The maximum allowable continuous
power dissipation at any ambient temperature is calculated by Po(MAX)=(T (MAX)-TA)/0.JA
3 The JW7715 guarantees robust performance from -40C to 150C junction temperature. The junction temperature
ange specification is assured by design, characterization and correlation with statistical process controls.
4)Measured on JESD51-7, 4-layer PCB
JW7715Rev0.31
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ELECTRICAL CHARACTERISTICS
TA= 25C. unless otherwise stated
em
Symbol
Condition
Mir
Max. Units
VCC Section
VCC Voltage
VCC
SW=40V. VCC=2.2uF
5.80
VCC Startup voltage
CC Startup
4.05
VCC UVLO
VCc uvlo
3.95
Operation Current(Switching)
GT=5nF Fsw=100 KHz
32
MA
Operation Current(GT On)
GT=5nF VCC=22UF
1.0
mA
Quiescent Current
VCC=4,5V.VCC=22UF
24
A
Gate Section
Gate Turn on Threshold
VMOS ON
300
mV
Gate Turn off threshold
MOS OFF
-10
Gate Turn off threshold in mot
VMOS OFF MOT
50
mV
Gate Turn on∨ oltage
SW=32V. VCC=22uF
CC
Gate Pull up current
GT=1V
0.5
Gate Pull down current
GD
GT=5V
5.5
RMOT=100K
1.5
US
Gate Minimum on Time
TMIN ON
RMOT=0 Q2
700
nS
Gate Minimum off time
550
nS
RGatE=OQ, CLOAD=5nF
84
Turn-on total delay
DON
ns
RGATE-OQ, CLOAD=10nF
94
RGatE=0Q, CLOAD=5nF
224
Turn-off total delay
T
nS
RGatE=O Q, CLOAD=10nF
324
SW and vo section
VCC Charge Current
SW=32V. VCC=3.5V
44
A
SW Control Voltage
VMOS REG
-60
m
SW Control Voltage MAX
MOS REG MAX
180
r
VO Enable Charge Voltage
VCC=3V SW=0V
VO Disable Charge voltage
Vo DIs
VCC=3V SW=0V
4.35
SW=OV, VCC=3.5V
VO Charge Current
IVO CHG
A
Vo Short-circuit Detection Voltage Vo_sHORT
2.1
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PIN DESCRIPTION
Pin no
Name
Description
GT
Drive the external nmosfet
GND
Ground
3
Power supply. Bypass a Capacitor Between VCC and GND
MOT
Set the minimum on-time, floating the pin means 1. 5us
Output Voltage Sensing and Charging to Vcc
SW
External Power MOSFET Drain Voltage Sensing. Charging to vcC
BLOCK DIAGRAM
Detection
UVLO
sW凸
H LDO
81
VcC
Regulator
Voltage
Detection
Control
GNDCH
&
Driver
GT
Regulation
Logic
Minimum off
Time
Minimum on
Time set
MOT
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FUNCTIONAL DESCRIPTION
Operation
arn on phase
JW7715 is a synchronous rectifier controller
When the synchronous MOEFET is conducting
hich combined with external mosfet can
current flows through the body diode of
replace the Schottky Barrier Diode. It supports
MOSFET, which generates a negative voltage
all operations, such as DCM, CrCM
Vsw across it. When vsw is lower than vr
QQuasi-Resonant) and CCM when adopted in
the part will pull the gate high to turn on the
flyback or LLC converters
synchronous MOSFET after turn on delay time
Startup
During the startup period, when the VCc is
lower than startup voltage, the external
MOSFET is turned off. The current flows though
300mV
body diode before the Vcc reaches to the
Tto
startup voltage Vcc startup
Under-Voltage Lockout (UVLO)
When the vcc is below UVlo threshold. the
external MOSFET is turned off and pulled low
Figure-1 Turn on delay and turn off delay
Iternally. Once the VcC exceeds the startup
Conducting Phase
voltage Vcc startup, the parts is activated
agaIn
When the synchronous MOSFET is turn on the
drain source voltage Vsw it is determined by its
DO Charging Logic
on resistance and the current through it. The
part adjusts the gate voltage and regulates the
JW7715 have two internal ldo to charge the
Vsw to a internal threshold(typical -60mV) after
VCC pin. When vo is lower than 4.55V
the synchronous MoSFet turn on. When the
JW7715 can power itself through the intenal
Vsw is lower than -60mv, the gate keep its
LDO connected to sW pin during the sr turn-off
maximum voltage. And the synchronous
period, which means primary the primary side
MOSFET is fully on
MOSFET is turned on and sw presents a
The vsw rises when the current follow through
positive voltage. A capacitor between VCC and
GND is required to store the energy and supply
the MOSFET decreases. The gate voltage will
be decreased to increase its on resistance and
to IC during the sr turn-on period
egulate the vsw around-60mV
The other internal ldo is connected from vo to
VCC, it charges VCC pin when Vo is higher
Figure 2 and Figure 3 show the theoretical
waveforms when a Flyback converter operated
than 4.55V
in DCM mode and CCM mode respectively
The control circuit contains a minimum on time
JW7715Rev0.31
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function. The Vsw voltage may have a parasitic
Turn off Phase
ng when the synchronous MOSFET turns on
So a minimum on time(Mot)is very important
After synchronous MOSFET conducting, once
to avoid the mosfet turn off threshold is false
the voltage Vsw touches the MOSFET turn off
triggered. During the minimum time, the gate
threshold (-10m), the gate is pulled to low after
can still be turned off if vsw touches a positive
turn off delay time TDOFF. A 550ns blanking
threshold value, +50mV
time is necessary to avoid error trigger
It should be noted that the typical regulation
Minimum on-time( MOT)
threshold (-60mv) during MOSFET on time is
not fixed, it can be internally changed to ensure
MOT stands for the minimum on time of
the proper operation under CCM mode
synchronous MOSFET or the maximum duty
cycle of primary MOSFET, The MOT can be
adjusted by a resistor connected to MOT pin
The relation between mot and the resistor is
shown in Figure 4. Floating MOT Will result in a
Vsw
maximum on time (-15us), and shorting MOT
to GNd turns out to a minimum on time(-700nS
1.mV
60my
for high frequency applications
IN ON
1.5us}-……………
VGT
VGTH
→ Minimum on time
700nS
Figure-2 Conducting phase for DCM mode
OR
100K
Figure-4 tMOT V.S. RMOT
Output voltage detection
-1 dmV
The JW7715 has output voltage detection
-6omV
function via vo pin. To avoid the gate error turn
on during starting-up period, the whole SR
control logic is disabled when the vo voltage is
lower than 2.1V. vCC is charged from vo pin
VGH
when vo is higher than 4. 55v to save power
loss caused by the LDo when charging from
Figure-3 Conducting phase for CCM mode
sW pin to Vcc pin
JW7715Rev0.31
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PACKAGE OUTLINE
SOT23-6
UNIT: mm
292±020
04±020
0.950BSC
0.15±0.05
190±0.10
JW7715Rev0.31
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IMPORTANT NOTICE
Joulwatt Technology Inc. reserves the right to make modifications, enhancements, improvements,
corrections or other changes without further notice to this document and any product described herein
Any unauthorized redistribution or copy of this document for any purpose is strictly forbidden
o Joulwatt Technology Inc does not warrant or accept any liability whatsoever in respect of any products
purchased through unauthorized sales channel.
Copynight 2016 Jw7715 Incorporated
All rights are reserved by Joulwatt Technology Inc.
JW7715Rev0.31
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