单相电流源并网光伏逆变器的设计与分析.pdf单相电流源并网光伏逆变器的设计与分析pdf,本文研究了用

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详细说明：单相电流源并网光伏逆变器的设计与分析pdf,本文研究了用于光伏（PV）应用的150W单相电流源并网逆变器的性能。恒流源采用大直流环节电感实现，逆变器采用单升压开关、H桥逆变器和CL输出滤波器实现。尽管直流环节电感导致逆变器的效率低于等效电压源逆变器，但由于零电流切换和元件数量较少，因此成本较低。此外，使用升压开关可以很容易地控制输出电流，并提供简单的开环和前馈控制。本文从输出功率、总谐波畸变和功率因数等方面对模拟和测量的逆变器性能进行了比较。此外，还通过仿真研究了概念对高功率（1.2千瓦）逆变器的扩展。As the inductor acts as a short circuit to dC, it can also be assumed that vpy is constant and has a value that is equal to the average value of vv(X). If it is initially assumed that both ipv(t)and Vpv are constant then the output power of the Pv array is constant though the instantaneous input power of the inverter is time-varying. This implies the dC link inductor must provide the required energy storage by absorbing or releasing the difference in power between That the Pv array provides and what the inverter requires It can be shown that there is a simple relationship between the Pv array current or voltage ripple in current and voltage source inverters, and the output power and the amount of stored energy required E0(2-3)[9] Ai Ae P/。20減 A similar calculation can be performed for Pv vsI inverters with a large DC link capacitor to obtain AⅴAEPQ 减0 where Po is the average inverter output power, o) is the angular frequency of the grid voltage, Al is the current ripple, av is the voltage ripple and ae is the peak energy variation C. Trade-off in Py Power Reduction due to Ripple versus Energy Storage Element Losses The amount of energy storage will be measured using the ratio of the energy e stored in the inductor to the rated PV panel output power and is given in millijoule per watt(mJ/W). Ripple in the Pv panel voltage or current causes the Pv panel not to operate at its maximum power point and hence results in an average power reduction Fig 3 illustrates this trade-off for a 150 W inverter using a particular inductor magnetic design(192 mH) Combining the Pv array power reduction curve and the inductor copper loss curve gives a total power loss"curve This illustrates the trade-off between the two types of losses with the minimum power reduction of about 4% at about 10m I/W. The larger the cncrgy storage, the lower the current ripple and hence PV average power loss; but the larger the inductor's size, cost and power losses(Pcu) 6 Total power Ass for L 4 CD (inductor PA(capacitor) △P(rple) 0 10 20 30 Energy Storage(mJ/w) Fig. 3: Inductor and capacitor trade-oIf graph, showing lotal power loss vS energy storage per watt for example CSI andⅴ SI inverters. Fig 3 also shows this power loss trade-off for a 138 W voltage-source inverter [10]assuming the ESR losses of the capacitor are fixed. The optimum point occurs with 44 mJ/w of energy storage at which point the total output power reduction is about 0. 25%, with the capacitor losses being comparable to the pv array power reduction. However capacitive energy storage using electrolytic capacitors has issues with long-term reliability D. Lffect of Energy Storage on Grid Current TID Fig, 4 shows the calculated THD curve of the gc csi at rated output power as a function of stored energy. The THD values arc inversely proportional to the amount of energy storage. A valuc of about 7 m J/w or above is ideally required to meet the 5%o grid THd requirement 0 15 0 5 0 20 Energy Storage (mJ/w Fig 4: THD at rated power vs energy storage It was also found for an inverter with a given amount of energy storage, that the Thd is inversely proportional to the output power. This is because the stored cnergy is proportional to the square of the dc link current while the output power is proportional to the DC link current E. Design of low Pass filter between GCl and Grid A GCi is required to provide high quality (low THd) power to the grid, whilst meeting the necessary power factor requirement. The output low-pass filter determines the harmonic attenuation and also affects the inverter power factor. However the importance of the low-pass filter design is often overlooked Such filter has copper and iron losses and hence reduces the overall inverter efficiency. The low-pass filter is designed such that the inverter is able to meet the following grid requirements [1 1] whilc exhibiting a low damping resistance power loss a power factor between 0. 8 lead and 0.95 lag, from 20% to rated output power and attenuate the high-frequency harmonics such that the output current contains less than 5% THD at rated output power. o For this application, a second-order CL type low-pass filter was used as it allows the coupling of the current ource inverter to the voltage source grid, according to the impedance mismatch criteria [12]. An example of this type of filter was shown in Fig. 1 where rd is the damping resistor. The use of normalization generalizes the analysis. Thus the filter cut-off (or resonant) frequency and filter components are normalized in this study. The normalized cut-off frequency, ocn is expressed in relation to the base frequency, OB, which is given as whe infl where fl represents the grid (inverter fundamental) frequency. Considering a single-phase inverter designed to deliver rated power, PB into a grid of rated voltage Fg, the resulting basc impedance, ZB can be given by (5), and later used to normalize the filter components. Note that the base impedance Zg, is designed as the ratio of the base voltage, VB and the base current IB lg Pa The normalized filter capacitance, Cn is given in(6), where CB is the base capacitance. Similarly, the normalized filter inductance, Ln is expressed relative to the base inductance, LB [131 a baseline filter design is determined as follows. The normalized capacitance Cn is selected as o 1 pu to meet the where CB--1 CB (BB leading power factor requirements. The cut-off frequency f is chosen as 500 Hz which is an order of magnitude above the fundamental frequency to prevent significant filter phase delay and roughly an order of magnitude below the selected switching frequency(4 kHz). Based on the recommendation [12]regarding a quality factor of o of 2 to 4, a value of 4 was selected. Note that o is dependent on the filter topology and the type of damping used Fig 5 shows the damping resistor loss(Pa) as a function of Thd obtained by changing the values of the Cm, fe and Q parameters one at a time at the rated output power(Po). The maximum THD is seen for the fc-l kHz case. On the contrary, the maximum power loss is seen for the fe= 250 Hz case. The 0=8 case is the best filter configuration in terms of the lowest THD and Pa. The baseline filter appears to be relatively optimum as well while offering a lower Q. The Cn=0. 15 pu case and baseline filter have similar performance at the rated output power I. 150 W CSI Inverter Implementation 2.5 f =250 Hz 2 1.5 5 pu Q=2 0.5 baseline f=1 kHz Q=8E.=0. 15 pu 01 4 THD (%. Fig 5: Damping resistance power loss versus THd at rated power when varying the Cn, fc and o parameters of the low-pass filter one at a time A. 150 INverter simulalion model A 150 W inverter system was simulated using the PSiM power electronic simulation package. The model is shown in Fig. 6, which includes the control circuitry, the inverter and the four-diode model that represents the 150 w PV module [7]. The voltage drops of the thyristor and reverse-blocking diode are taken into account and the on-resistance of the MOSfet is included. The dC link inductor and output filter inductor models include their copper loss. Since the test setup included an autotransformer, the inductance and resistance of the autotransformer are also considered in the simulation model before the 77. 5 v voltage source representing the grid R47 192mH COPPER 1.1 bMy0.679175H w. AAn Array 0.329 0.162.9mH 1.4 0033g 0 0.17 △ 2luF 775v Rnas 区 lR 095 4.6A CAR 4kHz Fig 6: 150 W inverter circuit simulation using PSIM, showing PV array (4-diode model), dC link inductor, waveshaper unfolding circuit, output filter, grid model, modulation index(MA) controller and PWM signal generator B. Inverter Design The CsI used in the system is required to convert the dc power from the Pv array to ac power for the grid by providing an output current that is in phase with the grid voltage, as seen in Fig. 6. The constant current from the pv modules and DC link inductor, is chopped by the waveshaper switch using a sinusoidal PWM control signal. A microcontroller(dsPIC30F401 1)is used to create 4 kHz PWM signals using a sine look-up table and the thyristor H-bridge inverter is used to reverse the output current polarity in order to create an AC output current Some of the component specifications of the proposed PV system are given in Table l. Fig. 7 illustrates th hardware implementation Table l: Specifications of the 150 w CsI Prototype Parameter value Output Power(PJ 142W Grid Voltage(VGRID) 53.5V(rms) Switching frequency 4 kHZ Maximum input voltage,(Vpy) 4.2V DC link Inductor(LDc) 192mH Filter Inductance(LF) 2.9mH Filter Capacitance(CF) 21^F Damping Resistance in the Filter(RD 44Q nINIAN Fig. 7: 150 W inverter showing the constructed powe electronics and control hardware C. Experimental results Fig. 8 shows the measured PV array output current and the grid-connected inverter output current at the nominal always be less than the PV cell current. The PV cell current should ideally be constant, but with the ut current must modulation index, MA, under nominal temperature and irradiance conditions. note the inverter outp finite value of DC link inductance, there will be some variation due to the 100 Hz power oscillations associated with the single-phase output TpkHPliH lQks,'s 200m【h22mvM5m(h1f Ky Fig 8: 150 W inverter. Measured CSI input (py) and output (G) currents at nominal MA. The vertical and horizontal scales are 2 A and 5 ms per division, respectively The simulation and test results of the CSI output current THd as a function of output power are shown in Fig. 9a Though there is a good correspondence in the Thd at rated output conditions, there is a substantial error in the simulated results under light loads. This could be due to the switching losses in the power electronics devices or may be due to the modified phase advance angle to match the rated output power test results. The phase angle value which is used in the simulation model is larger than the value used in the microcontroller Fig. 9b shows the simulated and measured results for the grid power factor as a function of irradiance. Note that during these studies the current was always leading, and the power factor is defined from the grid point of vicw with regards to a passive load. The figure shows that the grid power factor requirement of at least 0. 8 leading over the output power range of 20% to 100% of rated output has been met test grid specs. 百6 Q gr 4 specs 10 8.1%THD一 sIm 30 120 9 120 Output Pewer(w) Output Power(W) Fig 9: 150 W inverter Simulated power and b)output power factor as a function of output II. 1.2 kw csI Inverter design This section uses simulation results to investigate the effect on the Thd and efficiency obtained by scaling up the inverter design to 1.2 kW A. Circuit Design Fig. 10 gives an overview of the 1. 2 kW CSI circuit and component values. The dc link inductor model includes both estimated copper and iron loss R COPPER 1.1y Array 0.4889 0.19Q89mH 452mH 0.165g 大 1.2V 0.0 Grid 7.37uF 339,4 R MA 区 0.A3 796A REF 1V AkH The inductor was designed for the 1.2 kw inverter by linearly scaling the inductor design used for the 150 W inverter [9]. An energy storage value of 12 mJ/W was chosen which gave a stored energy of about 15 J The inverter output THD was 4.3%o under open-loop control and 2.8%o for the feed-forward control (FFD)mode. The FFD control uses the measured instantaneous DC link current to compensate for the 100 Hz ripple effect and so reduces this distortion The low-pass line filter for the 1.2 kw inverter was designed using the same approach described in section LE Although a 4 kHz switching frequency was used. the same as the prototype unit, this could be increased to 10 or 15 kHz. The maximum valuc of normalized capacitance Cn of0. 12 pu was chosen that still met the leading power factor requirement of 0.95. a value of quality factor of 4 was chosen which is within the recommended range of 2 to 4 Finally a ratio of cut-off frequency to switching frequency of slightly over 0. 15 was chosen using [13]. which is a trade-off between the grid filter loss and the THD. This resulted in cut-off frequency of around 620 Hz. Based on these selected values the filter inductance, capacitance and resistance can be calculated as Total fiteE 8.9 mH, 7 5 F and 135D c B Calculated Losses dode Fig 11 illustrates the simulated inverter power loss breakdown mosfet as a function of output power. This shows the power loss of the various stages of the grid-connected inverter, including: the DC link inductor, MOSFET and diode(ws), the unfolding circuit UC)and the output low-pass grid filter DC link inductor As the output current increases, the diode UC and filter losses all increase proportionally. The power loss at rated output is about 58 0.3 0.5 0.9 1 1.1 W and is dominated by the DC link inductor losses. This Output Power(kW Fig. 11: Simulated 1.2 kw CSI loss breakdown as a corresponds to a rated efficiency of 95%. Please note that the function of output power using FFD overall efficiency is approximately 1% less if the 100 Hz PV array ripple power reduction is taken into account 7060 0 A summary of the power loss breakdown at the rated output power is shown in Fig. 12. The dC link inductor losses(copper and core)have the largest fraction of the losses followed by the pv power output reduction due to ipple. The unfolding circuit has a loss of 13% which is much smaller compared to the 3 1% in the 150 W prototype cSi due to the higl her system voltage. Similarly the diode power loss is reduced from 11%o to 6% MOSFET loss, Diode loss. 6% 7% Unfolding circuit loss DC link inductor 13% core loss. 41% Low-pass filter loss 10% 100 Hz ripple lass 20% DC link inductor copper loss, 3% Fig 12: Simulated loss breakdown at rated output power for the 1. 2 kw grid-connected CSI V。 Conclusions This paper used simulations and experimental tests to investigate a current-source single-phase grid-connected inverter for photovoltaic(PV) applications The selection of the amount of DC link energy storage was found to be important to maximise the inverter output power. A larger amount of energy storage resulted in a lower DC link current ripple and hence a lower PV output power reduction, but increased the copper loss in the inductor. For the inductor design considered, a value of the order of 10 mJ/w at rated output power was found to give the highest output power The amount of DC link energy storage also affected the total harmonic distortion(THD)of the output current. If the control algorithm did not compensate for the dc link ripple current it was found that output current THD is inversely proportional to both the energy storage and the light intensity. For the inductor design considered, at least 7 mJ/w of energy storage was required to meet the grid THD requirement at rated output current. Note that feed-forward control based on measuring the instantaneous dc link current can be used to reduce the effect of the ripple current on the THD The correct selection of the parameters of the low-pass filter between the output of the inverter and the grid is also important to maximize performance. It was shown that a filter with a normalized capacitance of 0. 12 pu, a quality factor of between 2 and 4, and cut-off (resonant) frequency which was about one-tenth of the switching frequency gave acceptable values of THd and power-factor while keeping the filter damping losses at a reasonable level A 150 W inverter with an energy storage of 12 mJ/w was designed and constructed. It met the grid power factor requirement over the required 20%o to 100% of output power but the ThD of8. 1% at rated output power did not meet the 5 requirement Simulation results were used to investigate a 1.2 kW inverter design with a similar amount of energy storage. A predicted THD of less than 3%o with feed-forward control and an efficiency of about 95%o at rated output power were shown Further work is required to investigate the issues with the Thd for the prototype inverter and to experimentally demonstrate the simulated performance of the 1.2 kW design R eferences [1 Haeberlin H. "Evolution of inverters for grid connected PV-systems from 1989 to 2000, Proceeding of/7th Eur Photovoltaic Solar Energy Conference, Munich, Germany, pp. 426-430, Oct 22-26, 200 1 [2] Neba Y, Furuyama E, Calculation of Maximum Power in a Utility-Interactive Photovoltaic-Gienerating System by Using PWM Current-Source Inverter Electrical Engineering in apan, voL. 125, pp 55-64, 1998 [3]Hirachi K, Matsumoto K, Yamamoto M, and Nakaoka M ,"Improved Control Implementation of Single-Phase Current-Fed PWM Inverter for Photovoltaic Power Generation, Proceeding of IEE international Conference on Poer Electronics and Variahle speed Drives, London, UK, 1998 [4] Itoh, R; Ishizaka, K, Oishi, H. Okada, H, "Soft-switched current-source inverter for single-phase utility interfaces, Electronics Letters, vol 37, no 20, pp 1208-1209, 2001 [5]Han B M. Kim H J. and Back S. T, "New Soft-Switching Current Source Converter for Photovoltaic Power System, in Electrical Engineering, voL 86, pp. 285-29, 2004 [6]Whaley, D M Ertasgin, G; Soong, W.L.; Ertugrul, N. Darbyshire, J. Dehbonei, H: Nayar, C V, "Investigation of a Low-Cost Grid-Connected Inverter for Small-Scale Wind Turbines based on a Constant-Current Source Pm generator Proceeding of leeelecoN, Paris, france 2006 [7] Ertasgin, G: Whaley, D.M. Ertugrul N. and Soong WL,"A Current-Source Grid-Connected Converter Topology for Photovoltaic Systems, "Proceeding ofAUPEC, Melbourne, Australia, Dec 2006 Current-Source Grid-Connected Inverter for PV Applications, "Proceeding of IEEEICSET, Singapore Nov 200oW-Cost [8] Ertasgin, G. Whaley, D M: Ertugrul N. and Soong W L,"Implementation and Performance Evaluation of a Le 9 Ertasgin, G,Whaley, D M, Ertugrul, N. and Soong, W.L., "Analysis and Design of Energy Storage for Current-Source 1-ph Grid-Connected PV Inverters, Proceeding of IElE ApeC Conference and Exposition, Austin, USA, Feb 2008 [IO]Scapino, F and Spertino, F, Circuit Simulation of photovoltaic Systems for Optimum Interface between PV Generator and Grid, Proceeding of TEEE IECON, Spain, Nov 2002 [11] Standards Australia, ""Grid Connection of Energy Systems via Inverters, "Australian Standards, A$ 4777.1, AS 4777. 2, AS 4777.3 [12] Nave, M, Power Line Filter Design for Switched-Mode Poer Supplies, 1st ed. New York: Springer, Jul. 1991 [13] Whaley, D. M., " Low-cost small-scale wind power generation, "Ph. D. dissertation, The School of Electrical and Electronic Engineering, The Universily of Adelaide, Australia, JuL. 2009

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