Logarithmic Voltage-to-Time Converter for Analog-t

文件名称: Logarithmic Voltage-to-Time Converter for Analog-to-Digital Signal Conversion

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详细说明：Logarithmic Voltage-to-Time Converter for Analog-to-Digital Signal ConversionThis book presents a novel logarithmic conversion architecture based on cross-coupled inverter. An overview of the current state of the art of logarithmic converters is given where most conventional logarithmic analog-to-digital converter architectures are derived or adapted from linear analog-to- Digital converter architectures, implying the use of analog building blocks such as amplifiers. The conversion architecture proposed in this book differs from the conventional logarithmic architectures. From the architecture are also presented in this book.The book series Lecture Notes in Electrical Engineering (LnEe) publishes the latest developments in Electrical Engineering- quickly, informally and in high quality. While original research reported in proceedings and monographs has traditionally formed the core of LNEE, we also encourage authors to submit books devoted to supporting student education and professional training in the various fields and applications areas of electrical engineering. The series cover classical and emerging topics concerning Communication Engineering, Information Theory and Networks Electronics Engineering and microelectronics Signal, Image and Speech Processing o Wireless and mobile communication Circuits and systems Energy Systems, Power Electronics and Electrical Machines Electro-optical Engineering Instrumentation engineering e Avionics engineering Control System Internet-of-Things and cybersecurity e Biomedical devices. mEMs and Nems For general information about this book series, comments or suggestions, please contact leontina diceccospringer.com To submit a proposal or request further information, please contact the Publishing Editor in your country China Jasminedou,AssociateEditorjasminedouspringer.com) SwatiMeherishi,ExecutiveEditor(swati.meherishispringer.com) Anindabose,SeniorEditor(aninda.bosespringer.com) Jar TakeyukiYonezawaEditorialDirector(takeyuki.yonezawaspringer.com) South korea Smith(Ahram)Chae,Editor(smith.chaespringer.com) Southeast asia RameshNathPremnath,Editor(rameshpremnathspringer.com) USA. Canada MichaelLuby,SeniorEditor(michaellubyspringer.com) All other countries LeontinaDiCecco,SeniorEditor(leontina.diceccospringer.com) ChristophBaumann,ExecutiveEditor(christoph.baumannspringer.com) M Indexing: The books of this series are submitted to isI Proceedings, EI-Compendex, SCOPUS MetaPress, Web of Science and Springerlink i Moreinformationaboutthisseriesathttp://www.springer.com/series/7818 Mauro santos. Jorge guilherme. Nuno Horta Logarithmic Voltage-to-Time Converter for Analog-to-Digital Signal Conversion S ringer Mauro santos Jorge guilherme Synopsys portugal lda Instituto de telecomunicacoes 0, Portuga Instituto politecnico tomar Lisbon. Portugal Nuno horta Instituto de telecomunicacoes Instituto Superior tecnico Lisbon portugal ISSN1876-1100 issn 1876-1119(electronic) ecture Notes in Electrical Engineering ISBN978-3-030-15977-1 ISBN978-3-030-15978-8( e Book) https://doi.org/10.1007/978-3-030-15978-8 Library of Congress Control Number: 2019935487 C Springer Nature Switzerland AG 2019 This work is subject to copyright. All rights are reserved by the Publisher, whether the whole or part of the material is concerned, specifically the rights of translation, reprinting, reuse of illustrations, recitation, broadcasting, reproduction on microfilms or in any other physical way, and transmission or information storage and retrieval, electronic adaptation, computer software, or by similar or diss similar methodology now known or hereafter developed The use of general descriptive names, registered names, trademarks, service marks, etc. in this publication does not imply, even in the absence of a specific statement, that such names are exempt from the relevant protective laws and regulations and therefore free for general use The publisher. the authors and the editors are safe to assume that the advice and information in this book are believed to be true and accurate at the date of publication. Neither the publisher nor the authors or the editors give a warranty, express or implied, with respect to the material contained herein or for any errors or omissions that may have been made. The publisher remains neutral with regard to urisdictional claims in published maps and institutional affiliations This Springer imprint is published by the registered company Springer Nature Switzerland AG The registered company address is: Gewerbestrasse 11, 6330 Cham, Switzerland To my parents, Leonel and ana, and my wife yu To Paula. Ines and patricia To Carla, Joao and Tiago Preface Data converters are a fundamental building block for many systems and are used for functions such as digitizing voice image and wireless telecommunication signals among others. This is due to the enormous potential of digital signal processing nowadays, and without data converters, it would not be possible to have devices such as digital audio and video broadcast, digital cameras and mobile phones Usually, the converters employed in those applications have a linear scale, and for most applications that is the proper choice, however, for some applications, a nonlinear conversion scale may be more appropriate The work presented in this book belongs to the scientific area of analog-to-digital signal conversion and presents a novel logarithmic conversion architecture based on cross-coupled inverter. An overview of the current state of the art of logarithmic converters is given where most conventional logarithmic analog-to-digital converter architectures are derived or adapted from linear analog-to-digital converter archi- tectures; this implies the use of analog building blocks such as amplifiers. The use of such blocks requires additional circuit area and increases the total power con- sumption. It is also increasingly more difficult to implement these required analog blocks in more advanced technologies due to the decrease of supply voltages, as there is less voltage headroom, in short doing the required analog signal processing in the voltage domain is becoming increasingly difficult. The conversion architecture proposed in this dissertation differs from the conventional logarithmic architectures There is no requirement to use analog blocks such as amplifiers, and part of the signal processing is done in the time domain. This part of the signal processing is not affected by the reduction in supply voltages and benefits from the advances in integrated circuit manufacturing technologies. The signal conversion from the analog to the time domain is performed by a latched comparator or cross-coupled inverters. While these circuits are usually seen as digital parts, where only obtaining a decision within the allocation time matters, here the time required to reach a decision is the important feature The study of this voltage- to-time conversion ele ment is presented in this document. All the required blocks to perform the analog-to-digital conversion are almost digital blocks, and their speed and precision should benefit from the advances of integrated circuit manufacturing technologies Preface a demonstrator prototype has been designed, simulated, integrated and tested To test the demonstrator prototype, a fully custom test platform comprising custom test software and printed circuit boards has been developed The demonstrator prototype achieves a sampling rate of 81.5 MSPS with the full conversion archi tecture having an estimated figure of merit of 0. 0426 pJ/conversion The direction of future research is also identified and includes work such as integration of calibration in the voltage-to-time conversion element and work on an improved conversion architecture derived from the architecture proposed in this book This work is organized into seven chapters. Chapter I presents a brief intro- duction with the motivation and context to develop and propose new data converter topology. Chapter 2 discusses the background and the state of the art of nonlinear A/D converters. Chapter 3 presents and discusses the proposed logarithmic analog-to-digital converter. Chapter 4 describes the design of the voltage-to-time converter. In Chap. 5, the circuit designed and the layout are both validated Chapter 6 presents and discusses experimental results achieved from an imple mented prototype. Finally, in Chap. 7, the conclusions are drawn and possible future research lines are outlined Porto salvo, Portugal Mauro santos Lisbon, Portugal Nuno horta Lisbon, Portugal Jorge Guilherme Contents 1 Introductio 1.1 Nonlinear data Conversion 1. 2 Motivation 1.3R h goals 1.4 Innovative Contributions 7 1.5 Document Structure 8 References 2 Nonlinear A/D Converters 2.1 Floating point Converters 2. 2 Logarithmic Converters 14 2.2.1 thmic pipeline ce 16 2.2.2 Two-Step Logarithmic Ce 2. 3 Piecewise Linear Converters 18 2.4 Oversampled Converters 21 2.4.1 Delta c 2.4.2 Sigma-Delta C 22 2.5 Nonlinear Conversion Using Pulse width modulation 2.5.1 Modified Integrating ADC 2.5.2 PWM Average Approximation 25 2.6 Nonlinear Conversion USing a Lookup Table 26 2. 7 Other Architectures 27 2.8 Performance Metrics and Converter Testing 2.9 Conclusions 33 R eferences 34 3 Logarithmic adc 37 3. 1 Proposed Logarithmic ADC Architecture 37 3.2 Voltage-to-Time Conversion Element 38 3. 3 Regeneration Detection 43 Contents 3.4 Sources of Nonlinearity 46 3.4.1 Offset 46 3.4.2 S3 Switch Resistance 47 3.4.3 Regeneration Detection Circuitry 51 3.4.4 Thermal noise 53 3.5 Architecture Variants 54 3.5.1 Multiple Simultaneous Conversions 54 3.5.2 Polarity and Magnitude Independent Conversion..... 54 3.6 Time-to-Digital Converter 3.7 Conclusions 57 References 58 4 Logarithmic VTC Design 59 4.1 Determination of Key design Parameters 60 4.1.1 Sampling Capacitors 61 4.1.2 Total Transconductance 62 4.1.3 Degeneration Resistors 63 4.1. 4 Sampling switches 4.1.5 Regeneration detection 68 4.2 Simulaton results 69 4.2.1 Process variations 4.2.2 Input Referred noise and offset 4.3 Conclusions Reference ..73 5 Circuit and Layout level validation 5. 1 Configuration Chain 76 5.2 Fred 5.3 Frequency Output Pad 79 5.4 Voltage-to-Time Conversion elements 80 5.5 Phase Generator 5.6 Programmable delay block 86 5.7 Common Mode Voltage Effect on the Regeneration Detection Voltage 5.8 Demonstrator Integrated Circuit Layout 5.9 Simulation Results 5.10 Conclusions

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