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文件名称: STM32L071RBT6 M0 低功耗,5Uart,128KB Flash, 20KB,适合跑操作系统。-STM32L071RBT6.pdf
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  上传时间: 2019-09-03
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 详细说明:STM32L071RBT6 M0 低功耗,5Uart,128KB Flash, 20KB,适合跑操作系统。-STM32L071RBT6.pdfSTM32L071xX Contents 3.15.12Cbus 30 3.15.2 Universal synchronous/asynchronous receiver transmitter(USART).3 3.15.3 Low-power universal asynchronous receiver transmitter(LPUART). 31 3.15.4 Serial peripheral interface(SPI)Inter-integrated sound(12S) 32 3.16 Cyclic redundancy check(CRC)calculation unit 32 3.17 Serial wire debug port (SW-DP) 32 Pin descriptions.∴ 33 5 Memory mapping 52 Electrical characteristics ■ 53 6.1 Parameter conditions 53 6.1.1 Minimum and maximum values ...53 6.1.2 Typical values 6.1.3 Typical curves 6.1.4 Loading capacitor 6.1.5 Pin input voltage 53 6. 1.6 Power supply scheme 54 6.1.7 Current consumption measurement 54 6.2 Absolute maximum ratings 6.3 Operating conditions 57 6.3.1 General operating conditions .,,,,57 6.3.2 Embedded reset and power control block characteristics .59 6.3.3 Embedded internal reference voltage 60 6.3.4 Supply current characteristics 6 6.3.5 Wakeup time from low-power mode 6.3.6 External clock source characteristics 75 6.3.7 Internal clock source characteristics 79 6.3. 8 PLL characteristics .82 6.3.9 Memory characteristics .82 6.3.10 EMC characteristics ..83 6.3. 11 Electrical sensitivity characteristics ..,,,.86 6.3.12 0 current injection characteristics .,,,.,87 6.3.13 O port characteristics 88 6.3. 14 NRST pin characteristics 92 6.3.15 12-bit adc characteristics DocID027101 ReV 3 3/136 Contents STM32L071XX 6.3.16 Temperature sensor characteristics 98 6.3.17 Comparators ..99 6.3.18 Timer characteristics 100 6.3.19 Communications interfaces 100 Package information.......,............108 7.1 LQFP100 package information 108 7.2 UFBGA100 package information 111 7.3 LQFP64 package information 113 7. 4 TFBGA64 package information ...,,,,116 7.5 WLCSP49 package information ,,,,,,119 7.6 LQFP48 package information 122 7.7 LQFP32 package information 125 7.8 UFQFPN32 package information 128 7 9 Thermal characteristics 131 7 9.1 Reference document 132 Part numbering......,..,,. DD_■ ,,,133 Revision history ..,. 134 4/136 Doc 101 ReV 3 STM32L071xX List of tables List of tables Table 1 Device summary Table 2. Ultra-low-power STM32L071xx device features and peripheral counts Table 3. Functionalities depending on the operating power supply range 15 Table 4. CPU frequency range depending on dynamic voltage scaling 16 Table 5. Functionalities depending on the working mode from Run/active down to standby) 16 Table 6 STM32LOXX peripherals interconnect matrix ....18 Table 7. Temperature sensor calibration values Table 8 nternal voltage reference measured values 27 Table 9 Timer feature comparison 28 Table 10. Comparison of 12c analog and digital filters 30 Table 11. STM32L071xx I-C implementation Table 12. USART implementation .31 Table 13. SP1/12S implementation ...32 Table 14. Legend/abbreviations used in the pinout table ..38 Table 15. STM32L071XXX pin definition .39 Table 16. Alternate functions port A ..46 Table 17. Alternate functions port B Table 18. Alternate functions port C 48 Table 19. Alternate functions port D .49 Table 20. Alternate functions port E 国面 50 Table 21. Alternate functions port H Table 22. Voltage characteristics 55 Table 23. Current characteristics Table 24. Thermal characteristics 56 Table 25. General operating conditions .57 Table 26. Embedded reset and power control block characteristics .59 Table 27. Embedded internal reference voltage calibration values ..60 Table 28. Embedded internal reference voltage 60 Table 29. Current consumption in Run mode, code with data processing running from Flash memory 62 T able 30. Current consumption in Run mode vs code type code with data processing running trom Flash memory .....62 Table 31. Current consumption in Run mode, code with data processing running from RAM... 64 Table 32. Current consumption in Run mode vs code type code with data processing running from RAM 64 Table 33. Current consumption in Sleep mode 65 Table 34. Current consumption in Low-power run mode ..66 Table 35. Current consumption in Low-power sleep mode Table 36. Typical and maximum current consumptions in Stop mode ..68 Table 37. Typical and maximum current consumptions in Standby mode 69 Table 38. Average current consumption during Wakeup 70 Table 39. Peripheral current consumption in Run or Sleep mode Table 40. Peripheral current consumption in Stop and Standby mode 73 Table 41. Low-power mode wakeup timings 73 Table 42. High-speed external user clock characteristics 75 Table 43. Low-speed external user clock characteristics Table 44. HSE oscillator characteristics ,,,,77 DocID027101 ReV 3 5/136 List of tables STM32L071XX Table 45. LsE oscillator characteristics ....78 Table 46. 16 MHz Hs 16 oscillator characteristics 79 Table 47. lsi oscillator characteristics 80 Table 48. MSI oscillator characteristics ...80 Table 49, PLL characteristics 翻 82 Table 50. RAM and hardware registers 82 Table 51. Flash memory and data EEProM characteristics 82 Table 52. Flash memory and data EEPROM endurance and retention Table 53. Ems characteristics 84 Table 54. EMI characteristics 85 Table 55 ESD absolute maximum ratings ..86 Table 56. electrical sensitivities 86 Table 57. l/o current injection susceptibility ..87 Table 58. /0 static characteristics 88 Table 59. Output voltage characteristics 90 Table 60. /o ac characteristics 翻国 Table 61. NRST pin characteristics ..92 Table 62. Adc characteristics ...93 Table 63. RAIN max for fADC=16 MHz 95 Table 64. ADC accuracy 95 Table 65. Temperature sensor calibration values 98 Table 66 emperature sensor characteristics 98 Table 67. Comparator 1 characteristics 99 Table 68. Comparator 2 characteristics 99 Table 69. tiMx characteristics 100 Table 70. 12C analog filter characteristics 101 Table 71. USaRT/lPuart characteristics Table 72. SPI characteristics in voltage Range 1 102 Table 73. sPi characteristics in voltage range 2 103 Table 74. SPI characteristics in voltage Range 3 ,104 Table 75. 2S characteristics .106 Table 76. LQPF100-100-pin, 14 x 14 mm low-profile quad flat package mechanical data 109 Table 77. UFBGA100-100-pin, 7 X 7 mm, 0.50 mm pitch, ultra fine pitch ball grid array package mechanical data 111 Table 78. UFBGA100 recommended PCB design rules(0.5 mm pitch BGA) 112 Table 79. LQFP64-64-pin, 10 x 10 mm low-profile quad flat package mechanical data ..,113 Table 80. TFBGA64-64-ball, 5x 5 mm, 0.5 mm pitch, thin profile fine pitch ball grid array package mechanical data .116 Table 81. TFBGA64 recommended PCB design rules(0.5 mm pitch BGA) 117 Table 82. WLCSP49-49-pin, 3.294 x 3.258 mm, 0. 4 mm pitch wafer level chip scale package mechanical data ,.120 Table 83. WLCSP49 recommended PCB design rules(0.4 mm pitch) 12 Table 84. LQFP48-48-pin, 7 X 7 mm low-profile quad flat package mechanical data .123 Table 85. LQFP32-32-pin, 77 mm low-profile quad flat package mechanical data 126 Table 86. UFQFPN32-32-pin, 5x5 mm, 0.5 mm pitch ultra thin fine pitch quad flat package mechanical data Table 87. Thermal characteristics 131 Table 88. STM32L07 1 xx ordering information scheme 133 Table 89. Document revision history 134 6/136 Doc 101 ReV 3 STM32L071xX List of figures List of figures Figure 1. STM32L07 1 xx block diagram 12 Figure 2. Clock tree Figure 3. STM32L071XX LQFP100 pinout -14 X 14 mr .,,,,,33 Figure 4. STM32L071XX UFBGA100 ballout-7X mm 34 Figure5.STM32L071××LQFP64 pinout-10×10mm .34 Figure6.STM32L071×× TFBGA64 ballout-5X5mm ,,35 Figure 7. STM32L071XX WLCSP49 ballout 36 Figure 8. STM32L071XX LQFP48 pinout -7X7 mm .,37 Figure 9. STM32L071XX LQFP32 pinout 37 Figure 10. STM32L071XX UFQFPN32 pinout 38 Figure 11. Memory map 52 Figure 12. Pin loading conditions 53 Figure 13. Pin input voltage Figure 14. Power supply scheme 54 Figure 15. Current consumption measurement scheme ,54 Figure 16. IDD VS VDD, at TA= 25/55/85/105C, Run mode, code running from Flash memory, Range 2, HSE, 1WS ..63 Figure 17. IDD VS VDD, at TA= 25/55/85/105C, Run mode, code running from Flash memory, Range 2, HSl16, 1Ws Figure 18. DD VS VDD, at TA=25C, Low-power run mode, code running from RAM, Range 3, MSI (Range 0)at 64 KHz, 0 WS Figure 19. IDD VS VDD, at TA=25/55/85/105/125C, Stop mode with rtc enabled and running on LSE Low drive 68 Figure 20. IDD VS VDD, at TA= 25/55/85/105/125C, Stop mode with RtC disabled a! clocks o斤f 69 Figure 21. High-speed external clock source AC timing diagram Figure 22. Low-speed external clock source AC timing diagram 75 Figure 23. HSE oScillator circuit diagram Figure 24. Typical application with a 32 768 kHz crystal 78 Figure 25. HSl16 minimum and maximum value versus temperature Figure 26. VIH/VIL versus VDD(CMOS/Os 89 Figure 27. VIH/IL versus VDD(TTL /Os) 89 Figure 28. /0 AC characteristics definition 92 Figure 29. Recommended NRST pin protection 93 Figure 30. Adc accuracy characteristics 96 Figure 31. Typical connection diagram using the ADC Figure 32. Power supply and reference decoupling(VREF+ not connected to VDDA) ..97 Figure 33. Power supply and reference decoupling(VREF+ connected to VDDA ..98 Figure 34. SPI timing diagram -slave mode and CPHA=0 104 Figure 35. SPI timing diagram -slave mode and CPHA =11) ..105 Figure 36. SPI timing diagram-master mode(1) ..,105 Figure 37. s slave timing diagram(Philips protocol) .,,107 Figure 38. 1s master timing diagram( Philips protocol) (1) FIgure40.LQFP100-10pn,14×14 mm low-profile quad fla′" cage outl∴……107 Figure 39. LQFP100-100-pin, 14 x 14 mm low-profile quad flat pa ...108 recommended footprint 110 Figure 41. LQFP100 marking example(package top view) Figure 42. UFBGA100-100-pin, 7x 7 mm, 0.50 mm pitch, ultra fine pitch ball DocID027101 ReV 3 7/136 List of figures STM32L071XX grid array package outline Figure 43. UFBGA100-100-pin, 7 x7 mm, 0.50 mm pitch, ultra fine pitch bal 111 grid array package recommended footprint Figure 44. LQFP64-64-pin, 10 x 10 mm low-profile quad flat package outling ....113 Figure 45. LQFP64-64-pin, 10 X 10 mm low-profile quad flat recommended footprint 114 Figure 46. LQFP64 marking example (package top view) 115 Figure 47. TFBGA64-64-ball, 5 x 5 mm, 0.5 mm pitch thin profile fine pitch ball grid array package outline · Figure 48. TFBGA64-64-ball,5 X 5 mm, 0.5 mm pitch, thin profile fine pitch bal grid array recommended footprint 117 Figure 49. TFBGA64 marking example(package top view) 118 Figure 50. WLCSP49-49-pin, 3.294x 3.258 mm, 0.4 mm pitch wafer level chip scale package outline 119 Figure 51. WLCSP49-49-pin, 3.294 x 3. 258 mm, 0. 4 mm pitch wafer level chip scale recommended footprint 120 Figure 52. WLCSP49 marking example(package top view) .,121 Figure 53. LQFP48-48-pin, 7 7 mm low-profile quad flat package outline 122 Figure 54. LQFP48-48-pin, 7 x 7 mm low-profile quad flat recommended footprint ..124 Figure 55. LQFP48 marking example (package top view) 124 Figure 56. LQFP32-32-pin, 77 mm low-profile quad flat package outline 125 Figure 57. LQFP32-32-pin, 7 X 7 mm low-profile quad flat recommended footprint 126 Figure LQFP32 marking example(package top view) Figure 59. UFQFPN32-32-pin, 5x5 mm, 0.5 mm pitch ultra thin fine pitch quad flat package outline 128 Figure 60. UFQFPN32-32-pin, 5x5 mm, 0.5 mm pitch ultra thin fine pitch quad flat recommended footprint 129 Figure 61. UFQFPN32 marking example(package top view) .130 Figure 62. Thermal resistance 132 8/136 Doc 101 ReV 3 STM32L071xX Introduction Introduction The ultra-low-power STM32L071xx are offered in 9 different package types from 32 pins to 100 pins. Depending on the device chosen, different sets of peripherals are included, the description below gives an overview of the complete range of peripherals proposed in this mIly. These features make the ultra-low-power stM32L07 1 xx microcontrollers suitable for a wide range of applications Gas/water meters and industrial sensors Healthcare and fitness equipment Remote control and user interface PC peripherals, gaming, GPS equipment Alarm system, wired and wireless sensors, video intercom This STM32L071xx datasheet should be read in conjunction with the STM32L0X1xX reference manual (RM0377 For information on the ARM Cortex-MO+ core please refer to the Cortex -MO+ Technical Referencemanualavailablefromthewww.arm.comwebsite Figure 1 shows the general block diagram of the device family DocID027101 ReV 3 9/136 Description STM32L071XX 2 Description The access line ultra-low-power STM32L071xX microcontrollers incorporate the high performance ARM Core -M0+ 32-bit RISC core operating at a 32 MHz frequency, a memory protection unit(MPU), high-speed embedded memories(up to 192 Kbytes of Flash program memory, 6 Kbytes of data EEPROM and 20 Kbytes of RAM) plus an extensive range of enhanced l /Os and peripherals The stM32L071 xx devices provide high power efficiency for a wide range of performance It is achieved with a large choice of internal and external clock sources, an internal voltage adaptation and several low-power modes The sTM32L071 xx devices offer several analog features, one 12-bit ADC with hardware oversampling, two ultra-low-power comparators, several timers, one low-power timer (LPTIM), four general-purpose 16-bit timers and two basic timer, one RtC and one SysTick hich can be used as timebase. They also feature two watchdogs, one watchdog with interfaces: up to three 12Cs, two SPls, one 12S, four USARTs. a low-power UAR>Ock independent clock and window capability and one window watchdog based on bus cl Moreover the stm32L07 1 xx devices embed standard and advanced communicati (LPUART) The stM32L071 xx also include a real-time clock and a set of backup registers that remain powered in Standby mode The ultra-low-power STM32L071xX devices operate from a 1.8 to 3.6V power supply(down to 1.65V at power down) with BOR and from a 1.65 to 3.6V power supply without BOR option. They are available in the-40 to +125C temperature range. a comprehensive set of power-saving modes allows the design of low-power applications Cortex Intelligent Processors by ARM ARM 10/136 Doc 101 ReV 3
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