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S3F8S35XZZ-SO95_2019-03-04_带书签.pdf
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详细说明:三星MCU,数据手册,公开版,已经添加书签,非常方便阅读,芯片型号S3F8S35,英文s3F8s39/s3F8s35
Product Specification
zIlog
Warning: DO NOT USE THIS PRODUCT IN LIFE SUPPORT SYSTEMS
LIFE SUPPORT POLICY
ZILOG'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE
SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS PRIOR WRITTEN APPROVAL OF
THE PRESIDENT AND GENERAL COUNSEL OF ZILOG CORPORATION
As used herein
Life support devices or systems are devices which(a) are intended for surgical implant into the body, or (b)
support or sustain life and whose failure to perform when properly used in accordance with instructions for
use provided in the labeling can be reasonably expected to result in a significant injury to the user. A criti
cal component is any component in a life support device or system whose failure to perform can be reason
ably expected to cause the failure of the life support device or system or to affect its safety or effectiveness
Document disclaimer
C2013 Zilog, Inc. All rights reserved. Information in this publication concerning the devices, applications
or technology described is intended to suggest possible uses and may be superseded ZILOG, INC. DOES
NOT ASSUME LIABILITY FOR OR PROVIDE A REPRESENTATION OF ACCURACY OF THE
INFORMATION DEVICES OR TECHNOLOGY DESCRIBED IN THIS DOCUMENT. ZILOG ALSO
DOES NOT ASSUME LIABILITY FOR INTELLECTUAL PROPERTY INFRINGEMENT RELATED
IN ANY MANNER TO USE OF INFORMATION DEVICES OR TECHNOLOGY DESCRIBED
HEREIN OR OTHERWISE. The information contained within this document has been verified according
to the general principles of electrical and mechanical engineering
S3 and Z& are trademarks or registered trademarks of Zilog, Inc. All other product or service names are the
property of their respective owners
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s3F8s39/s3F8s35
Product Specification
zIlog
Revision History
Each instance in this documents revision history reflects a change from its previous edi
tion. For more details, refer to the corresponding page(s)or appropriate links furnished in
the table below
Revision
Date Level Description
Page
Aug 01
Original Zilog issue. A table of contents and pdF bookmarks will appear in the Al
2013
next edition, due to be published on or before Winter 2013
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Revision History
s3F8s39/s3F8s35
Product Specification
zIlog
Embedded a Lka
AnaD'YS Company
Product overview
1.1 S3C8-Series Microcontrollers
Samsung SAM8RC family of 8-bit single-chip CMOS microcontrollers offers a fast and efficient CPU, a wide
range of integrated peripherals, and various mask-programmable Read only memory(ROM) sizes. Address/data
bus architecture and a large number of bit-configurable Input/Output(/O) ports provide a flexible programming
environment for applications with varied memory and l/o requirements. It includes timer/counters with selectable
operating modes to support real-time operations
1.2 S3F8S39/F8S35 Microcontroller
The S3F8S39/F8S35 single-chip CMOS microcontrollers are fabricated using the highly advanced CMos process
technology based on Samsungs latest CPU architecture
The S3F8S39/F8S35 is a microcontroller with an embedded 32 K/16k byte full-flash ROM
By using a proven modular design approach, Samsung engineers have successfully developed the
S3F8S39/F8S35 by integrating these peripheral modules with the powerful SAM8 RC core
Four configurable /0 ports(26 pin)
Twenty six interrupt sources and eight interrupt levels
Eight bit-programmable pins for external interrupts
One watchdog timer function(Basic T imer)
One 8-bit basic timer for oscillation stabilization
Two 8-bit timer/counters and three 16-bit timer/counters with selectable operating modes
A STOP Wake-up Timer to wake up CPU from stop mode
. Watch timer for real time
Two asynchronous UART modules
One sPl module
e One lc module
Analog to digital converter with 16 input channels and 10-bit resolution
One bUz for programmable frequency output
The S3F8S39/F8S35 microcontroller is ideal for use in a wide range of home applications that requires simple
timer/counter, ADC, and so on. They are currently available in 32-pin SOP/SDIP and 32-pin ELP package
Comparison
S3F8S39
S3F8S35
Flash Size Bytes)
32K
16K
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s3F8s39/s3F8s35
Product Specification
1.3 Features
zilog
Embedded a Lka
1.3.1cPU
AnaD'YS Company
SAM8RC CPU core
1.3.2 Memory
Features of internal multi-time program Full-Flash memory are
32K x 8-bit program memory(S3F8S39)
16K x 8-bit program memory(S3F8S35)
o Sector size: 128 Bytes
o User programmable by LDC"instruction
o Sector erase available
o Fast programming time
o External serial programming support
o Endurance: 10,000 erase/program cycles
o 10 Years data retention
Data Memory(RAM)
1,040×8 bit data memory
1.3.3 Instruction Set
Seventy eight instructions
Idle and stop instructions
1.3.426| O Pins
Twenty six normal lo pins for 32 pin
1.3.5 Interrupts
Eight interrupt levels and 26 interrupt sources
Fast interrupt processing feature
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s3F8s39/s3F8s35
Product Specification
1.3.6 Timers and Timer/Counters
zilog
One programmable 8-bit Basic Timer(BT)for oscillation stabilization control or watchdog timenfavection
One 8-bit timer/counter(Timer a)with three operating modes
Interval mode
Capture mode
PWM mode
One 16-bit timer/counter(Timer O)with Interval mode and PWM mode
Two 16-bit timer/counter(Timer 1/2) with three operating modes
Interval mode
Capture mode
PWM mode
One 16-bit T imer B with one-shot-pulse output mode and repeat output mode. It can be triggered by external
input or software
One STOP Wake-up T imer with Ring oscillator as its clock source
1.3.7 Watch Timer
Interval time: 1995 ms, 0.125s.0.25s, and 0, 5s at 32.768 kHz
0. 5/12/4 kHz buzzer output selectable
1.3. 8 Analog to Digital Converter
16-channel analog input
10-bit conversion resolution
1. 3. 9 Two Channels UaRT
Full-duplex serial l/ o interface
Four programmable operating modes
Auto generating pal
irity bit
1.3.10 Multi-Master IC-Bus
Serial Peripheral Interface
Serial 8-bit Data Transfers
Programmable Clock Pre-scale
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Product Specification
1.3.11sP
zilog
Embedded a Lka
Support Master and slave Mode
AnaD'YS Company
Programmable Clock Pre-scale
1.3.12 Two Power-Down Modes
Idle mode: Stops only CPU clock
Stop mode: Stops system clock and CPU clock
1.3.13 Oscilation sources
Main clock frequency: 0.4 MHz-120 MHz
External rc for main clock
Internal RC: 8 MHz (typ ) 4 MHz(typ ) 1 MHz (typ ) 0.5 MHz(typ.
On-chip free running Ring oscillator with 32 kHz frequency for 16-bit timer 1
1.3.14 Instruction Execution Time
333 ns at fx=12 MHz(minimum, main clock
1.3.15 Built-In Reset Circuit (LVR
LoW-Voltage check to reset system
VLVR=1.9/2.3/3.0/3.9 V(by smart option)
1.3.16 Low Voltage Detect Circuit (LVD)
Flag or Interrupt for voltage drop detection
Programmable detect voltage: 2.1/2.5/3.2/4.1V
Enable/Disable software selectable
1.3.17 Operating Voltage Range
1. 8V to 5.5 V at 4 MHz (main clock
2.7V to 5.5V at 12 MHz(main clock)
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Product Specification
1.3.18 Package Type
zilog
Embedded a Lka
32-pin SDIP
AnaD'YS Company
·32- pin soP
32-pin ELP
1.3.19 Operating Temperature Range
40°to+85°C
1.3.20 Smart Option
ISP-related option selectable(ROM address 3EH)
Oscillator selection, LVR selection(ROM address 3FH)
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Product Specification
1.4 Block Diagram
zilog
6
Figure 1-1 illustrates the block diagram of S3F8S39/F8S35
AnaD'YS Company
XIN XOUT
Main OSc
TACLK
8bit timer/
Basic timer
TACAP
TAOUT
Counter A
l'O Port and Interrupt
Watch time
BUZ
Contre
TBOUT
16-bit Timer B
yO Port0←P0.0-P0.7
16-bit
TOOUT
Timer/ Countero
/O Port 1+>P1.0-P11
SAM88 RC
Core
T1CLK
oPot2+→P2.0P2.7
T1OUT
16-bit
TCAP→ Timer/Counter 1
1/O Port3→P3.0-P3.7
T2OUT
16-bit
T2CAP
Timer/Counter 2
UAR7T0|→→TXD
H RXDO
32K/16K Byte
1040 Byte
ROM
RAM
TXD1
SWT
UART1
SCK
MOSI
10-bit ADC
←ADC-AD15
NSS
Itac
lIC
Reset
TEST NRESET
VDD VSS
Figure 1-1 s3F8S39/F8S35 Block Diagram
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