您好,欢迎光临本网站![请登录][注册会员]  
文件名称: dlp4500_sch.pdf
  所属分类: 嵌入式
  开发工具:
  文件大小: 433kb
  下载次数: 0
  上传时间: 2019-08-24
  提 供 者: gaojie*******
 详细说明:dlp4500_schVideo Input and Muxing TPD8S009 24-bit RGB DATEN RXDATA, RXCLK VSYNC. HSYNC PCLK TFPA01 EDDI2C→M24c02 PDO 1.8V33v RXE Level DLPC350 24-bit RGB DATEN Level 24-bit RGB DATEN VSYNC HSYNC. PCLK shime VSYNC, HSYNC PCLK 1.8v33V DATE DRAWING NO REV TEXAS INSTRUMENTS 08152013 A3 2512909 SCALE SHEET RX DATAON DATO- DATAON Differential Pair 100 RX DATAOP 冂AT RX DATAOP RX DATAIN MATG1 RX DATAIN 5 Differential pair 100 RX DATAZN DAT1+ RX DATA1P DUn RXDATA1P5 RX DATAZP MATG2 DAT RX DATATN VCC 15 MATG3 DAT2 RXDA》xDAA5 (Differentia-Fa:r⊥0cohm RX DATA1P GND 5 RX DATA2P S> RX DATA2P 5 RX DATAON DAT2S1 RX OATAOP RX CLK\ CLKN Di fferential pair 100 RX CLKP GND RX CLK >>RX CLKP LK S TPD8SO09DSM 0.1uF DV EDI SDA SDA +6vl18 DVI IN 5y DVI 50 ESD9C5 UST5G ESD9C5, ST5G CFCIDDC GND UT‖L 10K R2 R3R4 HPLG DVI 5V 22K22K10K 0.1uF 2001-1-2-21-0C-BK VCC M24C02-MN6IP 951102-8622-AR DATE DRAWING NO REV TEXAS INSTRUMENTS 08152013 A3 2512909 SCALE SHEET 4 OF 29 U3-1 44 DVCLK R15 22 113 GND DIR RSVD MLX PCLK 7,10 1622 HSYNC X HSYNC 7.10 N74AVC1T45DCK VSYNC →> MUX VSYNC7,10 R19 R2Q: MUX DATAN 7, 10 DNI cTi1L40 CTL2 VI- DO NOT INSTALL CTL3 EXT RES TFP401APZP SML-LXC402SUGC S> ST MSTR MUX SELZ 7,11 DATE A3 DRAWING NO REV TEXAS INSTRUMENTS 08152013 2512909 SCALE SHEET 5 U3-2 52 03 53 AVCC 0.1uF 10LF 01uF CVCC 470C296 0.1uF OGND_0/19 PSP3V 011 OGND 4 CYY 0o13/64 PVCC C12 0.1uF 3千1 0. 1uF 69 0.1uF 0.1uF Q018 GND 0 GND Qo20 TFP40lAPZP 0023 TFP401APZP DATE A3 DRAWING NO REV TEXAS INSTRUMENTS 08152013 2512909 SCALE SHEET Panda connections Panda LightCrafter4500 DSS DAT23: 0 P1A70],P1B【70 HSYNC VSYNC PCLK P1 C7: 0, HSYNC, VSYNC PCLK DCIN JACK PP5V VO 1V8 EXT 1V8 GPIO 140 SYS MSTR MUX SEL GPIO 39 SYS USB SE GPIO 6 SYS TRIGGER SEL ISB SYS USB 24-bit RGB DATEN VSYNC HSYNC PCLK TFP401 PD EX 1.8V 33V DLPC350 Level SYS MSTR MUX SEL Shifter 3 DSS DAT[23: 0 Level DAT日 Shifter P1 AB/C7: 0, DATEN, 24-bit RGB VSYNC HSYNC PCLK SYNC HSYNC PCLK EX 1.8V 3.3V USB Level SYS USB SE Shifter SYS USB J21 USB Panda to LightCrafter 1500 Connections DATE DRAWING NO TEXAS INSTRUMENTS 08152013 A3 2512909 SCALE SHEET了 EXT 1V8 C19 0. luF PP 5P0V PP5P0V VDE: AUJX2 FXT 1VE S> SYS MSTR MUX SEL 5 17 SYS USB DN > SYS LARTO RXD 11 17 SYS USE8DP《 6 C20 J1 C23又R CRV UARTO TXD 11 0.1LF S> SYS TRIG_111 11 DRV_GPIO11> 910 DRV GPIO12 11 211 111 7 SYS DATA01《 7 SYS DATA2C< 少3 YS DATA217 CRV EXT POWER ON 11 > SYS GPIOS 7 SYS DATA03<- SYS CATAC2 7 SYS DATA17<- SYS DATA187 CRV TRIG OUTB 2 14 >GYG CATAC4 7 7 GYG DATA15 少 Y3 DATA167 CRY TRIG OUTD114 K DRV GPIO00 11 7 SYS DATA12 7 SYS DATA07<- 少 SYS DATA137 CRV INIT DONE 11 13 SvS TRIGGER SEL 少> SYS UART SELI1 7 SYS DATA3《 S> SYS CATA14 7 7 SYS DATA《 少 SYS USE SE 11 2122 K DRV GPIO02 11 7 SYS DATA19《 > SYS CATA22 7 7 SYS DATA0s《 少8Ys2C1sCL16 DRV TRIG OUTA 1 13 .6 SYS I2C1_ SDA< 2>SYS_CATA117 SYS DATA >> SY5 PCLK7 13 DRV TRIG OUTA 2 SYS VSYNC 7 SYS DATA EN 少 SY5 HSYNG7 SYS 12C OE< SSQ-114-01-F-D SSQ-114-01-FD SFM-110-03-L-D-A SFM-11C-03-L-D-A PANDA DATA PATH CONNECTORS PANDA IO CONNECTOR PANDA I/O CONNECTOR Processor Interface Connectors DATE A3 DRAWING NO REV TEXAS INSTRUMENTS 08152013 2512909 SCALE SHEET 8 P3P3V EXT 1 P3P3V UE-1 2 2U6-2 9 SYS DATAOO 147/45 PI A 9 SYS DATA08 1825.10 o SYS DATA01 >X D SYS DATAOD 2A2/6 P1 A5 SYS DATAn2 9 SYS DATA10> F534 9 SYS DATAOS >X 1A4 9 SYS DATA11 2A4|f635 9 SYS DATA04 >X 9 SYS DATA12 > C536 9 SYS DATA05 9 SYS DATA13 9 SYS DATA06 >> 9 sYS DATA14 2B7 2A7/H6 0 SYS DATAO7 D SYS DATA15 P1 B0 1DIR 1GND2 1GN01/84 GND 2GNC1AE SN74AVC32T245ZKE SN74AVC32T245ZKE EXT 1V8 P:P3V 彐63 U6-4 e SYS DATA16 P1:251 SYS FCLK> 4A1 SYS DATA17 P1C55,1C TAE 5.10 9 SYS DATA18 > 9 SYS VSYNC 9 SYS DATA19 > 0 SYs DATA EN> 9 SYS DATA20 4A5}5 SYS DATA22 SYS DATAZ 4A875 GND2 3GND 4GND2 4GND1 SN74AVC32T245ZKE SN74AVC32T245ZKE 5.11 ST MS"R MUX SELZ >Y DATE A3 DRAWING NO REV TEXAS INSTRUMENTS 08152013 2512909 SCALE Sheet 9 NOTE The input data channels can be configured to optimize board ayout or each port Bitwise reordering is not supported F1A9 For example, Y data could ke conrected to Pcrt A, B, r C Port configuration is handle in the ApI Software NOTE If only cne input clock is used, then PlA CLK should be connected, and lB ClK and Plc Cl< should not be connected 巧F1 Front end cl。cks EAC⊥ F1C 9 a n FlC VLIX PCIK 5 MUX PCLK FIELD F1 FIELD 57 MUX DATAEN N RXE AP Differential Pair 100 ohm Differential Pair 100 ohm RCK IN P RKE B Differential Pair 100 oh 匚 afferentia⊥Pair100ohm RXE CN 怨B RXE DP RXE EP RXE DP Differential Pair 100 o RD IN N RXE DN17 16 RKE EN Differential Pair 100 ohm RKE E. FIN P AXK5S20047YG RESERVED RESERVED P20 DLPC35CZFF ront End interfa DWN DAT三 TEXAS INSTRUMENTS ISSUE ATE 8/152013 A3 2512909 SCALE HEET 100F 29
(系统自动生成,下载前可以参看下载内容)

下载文件列表

相关说明

  • 本站资源为会员上传分享交流与学习,如有侵犯您的权益,请联系我们删除.
  • 本站是交换下载平台,提供交流渠道,下载内容来自于网络,除下载问题外,其它问题请自行百度
  • 本站已设置防盗链,请勿用迅雷、QQ旋风等多线程下载软件下载资源,下载后用WinRAR最新版进行解压.
  • 如果您发现内容无法下载,请稍后再次尝试;或者到消费记录里找到下载记录反馈给我们.
  • 下载后发现下载的内容跟说明不相乎,请到消费记录里找到下载记录反馈给我们,经确认后退回积分.
  • 如下载前有疑问,可以通过点击"提供者"的名字,查看对方的联系方式,联系对方咨询.
 相关搜索: dlp4500_sch.pdf
 输入关键字,在本站1000多万海量源码库中尽情搜索: