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N3290x_DataSheet_Revision_A6.2.pdf
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N3290X DATASHEET
Nuvoton Technology corp.
3
Release date: oct . 2018
http:/www.nuvoton.com/
Rev. A6.2
nuVOTon
N3290X DATASHEET
Nuvoton Technology corp.
Release date: oct . 2018
http:/www.nuvoton.com/
Rev. A6.2
nuVOTon
N3290X DATASHEET
O ELA (Educational Learning Aid)
●HMI
● Securit'
e Home Appliance
Advertisement
Nuvoton Technology corp.
5
Release date: oct . 2018
http:/www.nuvoton.com/
Rev. A6.2
nuVOTon
N3290X DATASHEET
CPU
ARM926EJ-S32-bit RISC CPU with 8KB I-Cache 8KB D-Cache
Frequency up to 200MHz1. 8V core power operation voltage
JTAG interface supported for development and debugging
Intern al sram rom
8KB internal SRAM and 16KB IBR internal booting rom supported
IBR booting messages displayed by UaRT console for debugging supported
Different system booting modes supported:
◆ Memory card
SD card
O SD-to-NAND flash bridge
◆ Raw nand f|ash
◆sPIF|ash
USB
EDMA (Enhanced DMa)
Totally 5 DMA channels supported
4 peripheral DMa channels for transfer between memory and on-chip
peripherals, such as adc uarT and SPI
One dedicated channel for memory-to-memory transfer
Byte, half-word and word data width types supported
Single and burst transfer modes supported
Block transfer supported in memory-to-memory transfer channel
Color format transformation supported in memory-to-memory transfer
channe
Source color format could be rgb555 rgb565 and ycbcr 22
Destin ation color format could be rgb555, rgb565 and ycbcr422
Auto reload supported for continuous data transfer
Interrupt generation supported in the half-of-transfer or end-of-transfer
apture(CMOS Sensor I/F
CCIR601 CCir656 interfaces supported for connection to CMos image
sensor
Resolution up to 2M pixel for still Image Capture 640X480 (VGA) resolution
for MJPEg Video Streaming
YUV422 and RGB565 color format supported for data-in from CMos sensor
YUV422, RGB565, RGB555 and Y-only color format supported for data
storing to system memory
Planar and packet data formats supported for data storing to system
memory
Image cropping supported with the cropping window up to 4096X2048
Image scaling-down supported
Vertical and horizontal scaling-down for preview mode supported
e The scaling factor is N/M
e Two pairs of configurable 8-bit N and 8-bit M for vertical and
horizontal scaling-down
the value of n has to equal to or less than M
o Frame rate control supported
Combines two interlace fields to a single frame supported for data in from
TV-decoder
Nuvoton Technology corp.
Release date: oct . 2018
http:/www.nuvoton.com/
Rev. A6.2
nuVOTon
N3290X DATASHEET
JPEG Codec
Baseline Sequential mode JPEG codec function compliant with ISO/IEC
10918-1 international JPEG standard supported
Planar format
Support to encode interleaved YCb Cr 4: 2: 2/4: 2: 0 and gray-level (Y
only) format image
Support to decode interleaved YcbCr 4: 4: 4 /4: 2: 2 /4: 2: 0/4: 1: 1 and
gray-level (Y only)format image
Support to decode ycb Cr 4: 2: 2 transpose format
Support arbitrary width and height image encode and decode
Support three programmable quantization -tables
Support standard default Huffman-table and programmable Huffman
table for decode
Support arbitrarily 1XN8X image up-scaling function for encode mode
Support down-scaling function for encode and decode modes
Support specified window decode mode
Support quantization -table adjustment for bit-rate and quality control
in encode mode
Support rotate function in encode mode
Packet Format
Support to encode interleaved YUYv format input image, output
bitstream 4: 2:2 and 4: 2:0 format
Support to decode interleaved ycbCr 4: 4: 4 /4: 2: 2/4: 2: 0 format image
Support decoded output image RGB555, RGb565 and rgB888 formats.
The encoded JPeG bit-stream format is fully compatible with JFIF and
EXIF standards
Support arbitrary width and height image encode and decode
Support three programmable quantization -tables
Support standard default Huffman-table and programmable Huffman-
table for decode
Support arbitrarily 1X 8X image up-scaling function for encode mode
Support down-scaling function 1XN 16X for Y422 and Y420, 1XN 8X for
Y444 for decode mode
Support specified window decode mode
Support quantization-table adjustment for bit-rate and quality control
in encode mode
2D Accelerator
BitBLT operation
2x2 transform matrix with effects
Scale
● Trans|ate
Rot
Shear
o Alpha blending and color transformation supported
Source format for operations: supported color format of source bitmap
Fill
Rectangle fill with single color - argb8888
Fill with blending effect supported
Supported color formats
Source
Nuvoton Technology corp.
Release date: oct . 2018
http:/www.nuvoton.com/
Rev. A6.2
nuVOTon
N3290X DATASHEET
e 16 bits/pixel - RGb565
32 bits/pixel- ARGB8888
1 bit/pixel, 2 bits/pixel 4 bits/pixel, 8 bits/pixel with RGB color
palette
◆ Destination
16 bits/pixel - RGB565
32 bits/pixel- ARGB8888
VPOST
8/16/18-bit SYNC type and 8/9/16/18-bit MPU type TFT LCD supported
Color format supported:
YCb Cr422, RGB565, RGB555, and RGB888 color formats supported for
data in
o YCbCr422, RGB565, RGB555, and RGB888 color formats supported for
data out
XGA(1024x768),SVGA(800×600),WVGA(800×480),D1(720X480),VGA
640×480), WQVGA(480×272),QVGA(320×240) and HVga(640×240)
resolution supported
o The maximum resolution is up to D1 (720X480)for tv output
The maximum resolution is up to 1024X768 for TFT LCD panel for still
image displaying
The maximum resolution is up to 480x272 for TFT LCD panel for MJPEG
video displaying up to 25fps
Display scaler to fit different size of LCD panels
Horizontal: at most 4,0x scale
e Vertical: at most 3. 0x scale
■ For sYNC type LCD:
◆For8- bit bus
CCIR601 YCbCr422 packet mode(ntSC/PAL) supported
CCIR601 RGB Dummy mode(NtsC/PAL)supported
CCIR656 interface supported
e RGB Through mode supported
◆For16/18- bit bus
e Parallel pixel data output mode(1-pixel/1-clock)
Color format transform supported
Color format transform between ycbcr 22 and rgb565
Color format transform from ycb cr422 to rgb888
Support osd function to overlap system information like battery life
brightness tuning, volume tuning or muting, etc
e frame Switch Controller
Frame relation controlled between VPOST and Capture supported
2 modes supported to switch Frame Buffer Base
Frame ratio Mode(16 selectable ratio)
◆ Frame sync mode
Double/triple buffers supported
SPU (Sound Processing Unit
32 stereo channels supported
I PCM8/PCM16/4-bit MDPCM/TONE source format supported
7-bit volume control supported for each of 32 channels
5-bit pan control supported for each L/R of 32 channels
10-band equalizer supported
Nuvoton Technology corp.
8
Release date: oct . 2018
http:/www.nuvoton.com/
Rev. A6.2
nuVOTon
N3290X DATASHEET
Special code supported for loop playing and event detection
Audio dac
16-bit stereo DAC supported with headphone driver output
H/W volume control supported
I2 S Contro‖lr
I2S interface supported to connect external audio codec
16/18/20/24-bit data format supported
Storage Interface controller
Interface to nand flash
o 8-bit data bus width supported
SLC and Mlc type NANd Flash supported
9 512B, 2KB, 4KB, and 8KB page size NAND Flash supported
ECC4, ECC8, ECC12 and ECC15 algorithm supported for ecc generation
error detection and error correction
PBA-NAND flash supported
Interface to SD/MMC/SDIO/SDHC/micro-SD cards supported
SD-to-NAND flash bridge supported
DMA function supported to accelerate the data transfer between system
memory and NAND Flash or SD/MMC/SDIO/SDHC/micro-SD
USB Device Controller
USB2.0 HS(High-Speed)x 1 port
6 configurable endpoints supported
Control, Bulk, Interrupt and Isochronous transfers supported
Suspend and remote wakeup supported
● USB Host controller
a USB1.1 Host one H/W Engine, two pin locations
Fully compliant with USB Revision 1.1 specification
Open Host Controller Interface(OHCI) Revision 1.0 compatible
Full-speed(12Mbps )and low-speed (1.5Mbps)USB devices supported
Control, Bulk Interrupt and Isochronous transfers supported
Timer Watch-Dog Timer
Two 32-bit with 8-bit pre-scalar timers supported
One programmable 24-bit Watch-Dog Timer supported
PWM
4 PWM channel outputs supported
16-bit counter supported for each PWM channel
Two 8-bit pre-scalars supported and each pre-scalar shared by tWo PWM
channels
Two clock-dividers supported and each divider shared by tWo PWM channels
Two Dead-Zone generators supported and each generator shared by two
PWM channels
Auto reloaded mode and one-shot pulse mode supported
Capture function supported
Nuvoton Technology corp.
Release date: oct . 2018
http:/www.nuvoton.com/
Rev. A6.2
nuVOTon
N3290X DATASHEET
●UART
a high speed UART supported:
Baud rate is up to 1M bps
9 4 signals TX,Rx cts and rts supported
A normal UART supported
Baud rate is up to 115.k bps
2 signals TX and RX supported only
SPI
SPI controller is supported
N3290XRX DN and N3290XUXDN series support one SPI controller
N3290XKXDN series can support up to two SPi controllers
Both master and slave mode are supported in SPI interface
o Two chip selection signals for two SPI devices
I20
One I2C channel supported
Compatible with Philips's I-C standard and only master mode supported
Multi-master operation supported
Advanced Interrupt controll
Total 32 interrupt source supported
Configurable interrupt type
Low-active level triggered interrupt
High-active level triggered interrupt
Low-active edge(falling edge) triggered interrupt
High-active edge(rising edge) triggered interrupt
Individual interrupt mask bit for each interrupt source
8 different priority levels supported
Daisy-chain priority mechanism supported for interrupts with same priority
eve
LoW priority interrupt automatic masking supported for interrupt nesting
RTC
Independent power plane supported
32.768 KHz crystal oscillation circuit supported
I Time counter(second, minute, hour) and Calendar counter (day month
year) supported
Alarm supported(second, minute, hour, day month and year)
12 /24-hour mode and Leap year supported
Alarm to wake chip up from Standby mode or from Power-down mode
supported
Wake chip up from Power-down mode by input pin supported
Power-off chip by register setting supported
Power-on timeout is supported for low battery protection
GPIO
80 programmable general purpose I/Os supported and separated into 5
groups
Individual configuration supported for each I/o signa
Configurable interrupt control functions supported
Nuvoton Technology corp.
10
Release date: Oct. 2018
http:/www.nuvoton.com/
Rev. A6.2
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