SiI9022ACNU.PDF.pdf电子行业GVO信号转换HDM信号I芯片,SII9022DATA

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详细说明：电子行业GVO信号转换HDM信号I芯片,SII9022DATASHEET，Sig022A/Si9024A HDMI Transmitter Data sheet Silicon image. inc Table of contents General Description Video Input HDMI Output.… Control Capability.... ·· Digital Audio Interface......... Power Management Packaging…………………… Comparison of the Sil9022A/Sil9024A Device With Other hdMi transmitters Ball and Pin diagrams 81-ball VFBGA Package 49-ball VFBGA Package.. 72-pin QFN Package Functional Description Video data Input and conversion 233456777 Input clock Multiplier/Divider Video data Capture Embedded Sync d ecoding Data Enable generator RGB to Y Cb Cr Color Space Converter....... 7 YCbCr to RGB Color Space Converter..... 8 4: 2: 2 to 4: 4: 4 Upsampler 4: 4: 4 to 4: 2: 2 Downsampler Dither 10 to 8 Common Video Input Formats TMDS Digital core Audio data Capture logic 9 S/PDIF Audio Input I-S Audio Inputs Supported Audio Sampling Rates.... ·········· 10 Interrupt output Control and Configuration.. Registers/ Configuration Logic.... Ilost processor slave l-c interface DDC Master [C Interface CEC Interface +, Electrical Specifications 4 Absolute Maximum Conditions 4 Normal Operating conditions.... lOVCC Supply Voltage Requirements …14 C Specifications Digital 1/O Specifications DC Power Supply Specifications... AC Specifications 自自曲“非非自非自非 TMDS AC Timing Specifications Audio AC Timing Specifications Video Input Ac Timing Specifications..... ··· Control Signal Timing Specifications………… Timing diagrams Input Timing Diagrams.... 22 Audio Timing diagrams Power Supply Sequencing ? Output Timing Diagrams…………… Minimum Horizontal blanking Specification. ······· 25 Sil-DS-1076-B C 2009 Silicon Imagc, Inc. All rights rcscrvcd CONFIDENTIAL Sig022A/Sil9024A HDMI Transmitter Data sheet Silicon Image, Inc Ball and Pin descriptions 26 Video input 26 Audio Input 27 CEC 27 Configuration and control …28 DDC Bus Differential dat 29 P 30 Feature Information ·中············“······“······**· ∴.31 Data Bus Mappings....... Data Mappings for 81-ball and 72-pin Package RGB and y cbcr 4: 4: 4 Separate sync formats YC4: 2: 2 Separate sync formats YC4: 2: 2 Embedded Sync Formats..... 37 YC Mux 4: 2: 2 Separate Sync Formats YC Mux 4: 2: 2 Embedded Sync Formats....... ···· 42 YC4: 2: 2 Embedded Sync dual edge Format........ RGB and ycbCr 4: 44 Dual Edge Formats 45 YC4: 2: 2 Separate Sync Dual Edge Formats 146 Data Mappings for 49-ball Package 19 YC4: 2: 2 Separate Sync Formats 49 YC4: 2: 2 Embedded Sync Format...... YC Mux 4: 2: 2 Separate Sync Format YC Mux 4: 2: 2 Embedded Sync Format YC 4: 2: 2 Embedded Sync dual edge Format RGB and y cb Cr 4: 4: 4 dual edge formats YC4: 2: 2 Separate Sync dual Edge formats ·“· Design Recommendations 58 P Supplies de oli 8 High-Spced TMDS Signals 58 ource termination 58 ESD Protection Transmitter Layout Guidelines,. 59 Hot Plug Signal Conditioning.... EMI Considerations Typical( Circuits… 60 Power Supply Decoupling 60 HDMI Port Connections Control Signal Connections... .62 Digital video Input Connections Packaging… 49-ball Package Dimensions 8I-ball Package dimensions 72 pin Package Dimensions…… 66 Marking Specification 67 Ordering Information 68 References 69 Standards documents∴ 69 Silicon image documents o 2009 Silicon Imagc, Inc. All rights rcscrvcd Sil-DS-1076-B CONFIDENTIAL Sig022A/Si9024A HDMI Transmitter Data sheet Silicon image. inc lList of figures Figure 1. Typical Application(Sil9022A HDMI Transmitter Shown) Figure2.81- ballBall Diagran( Top view)…….. Figure 3. 49-ball Ball Diagram(Top view) Figure4.72- pinPin Diagram( Top View)………… Figure 5. Functional Block diagram 34567 Figure 6. Transmitter Video Data Processing Path Figure 7. Simplified Host I-C Interface using Master DDC Port 12 Figure 8. Master I C Supported Transactions Figure 9. IDCK Clock Cycle/High/Low Times 22 Figure 10. Control and Data Single-Edge Setup/Hold Times to IDCK 22 Figure 11 Dual-Edge Sctup/ Hold Times to IDCK ··中············ Figure 12. VSYNC and HSYNC Delay Times from/to DE... Figure 13. DE High/Low Times 23 Figure 14. Conditions for Use of reSet# Figure15. RESET# Minimum Timings…… 23 Figure 16 Is Input Timings Figure 17. S/PDIF Input Timing, 24 Figure 18 MCLK Timings.. 24 Figure 19. Power Supply Sequencing 24 Figure 20. Differential Transition Times Figure 21 I-C Data Valid Delay(Driving Read Cycle Data).... Figure 22. INT Output Signal Response to Interrupt Condition. Figure 23. Parallel Input video to HDMI Output Video Permutations 5523 Figure 24 8-Bit Color Depth RGB/YCbCr 4: 4: 4 Separate Sync Timing(81-ball and 72-pin Package) Figure 25 8-Bit Color Depth YC 4: 2: 2 Separate Sync Timing(81-ball and 72-pin Package). Figure 26. 10-Bit Color Depth YC 4: 2: 2 Separate Sync Timing( 81-ball and 72-pin Package) Figure 27. 10-Bit Color Depth YC 4: 2: 2 Separate Sync NB Mode Timing(81-ball and 72-pin Package).....35 Figure 28. 12-Bit Color Depth YC 4: 2: 2 Separate Sync Timing(81-ball and 72-pin Package 36 Figure 29 12-Bit Color Depth YC 4: 2: 2 Separate Sync NB Mode Timing(81-ball and 72-pin Package) 37 Figure30.8- Bit Color Depth Yo4:2:2 Embedded Sync Timing(8l- ball and72 pin Package)…………38 Figure 31. 10-Bit Color Depth YC 4: 2: 2 Embedded Sync Timing(81-ball and 72-pin Package 38 Figure 32. 10-Bit Color Depth YC 4: 2: 2 Embedded Sync NB Mode Timing(81-ball and 72-pin Package) 38 Figure 33 12-Bit Color Depth YC 4: 2: 2 Embedded Sync Timing(81-ball and 72-pin Package) 39 Figure 34. 12-Bit Color Depth YC 4: 2: 2 Embedded Sync NB Mode Timing(81-ball and 72-pin Package).....40 Figure 35 8-Bit Color Depth YC Mux 4: 2: 2 Separate Sync Timing(&1-ball and 72-pin Package 41 Figure 36 10-Bit Color Depth YC Mux 4: 2: 2 Separate Sync Timing(81-ball and 72-pin Package) 41 Figure 37 12-Bit Color Depth YC Mux 4: 2: 2 Separate Sync Timing( 81-ball and 72-pin Package 41 Figure 38 8-Bit Color Depth YC Mux 4: 2: 2 Embedded Sync Timing(81-ball and 72-pin Package) 42 Figure 39. 10-Bit Color Depth YC Mux 4: 2: 2 Embedded Sync Timing(81-ball and 72-pin Package) Figure 40. 12-Bit Color Depth YC Mux 4: 2: 2 Embedded Sync Timing(&1-ball and 72-pin Package) 43 Figure 41 12-Bit Color Depth YC 4: 2: 2 Embedded Sync Dual Edge Timing(81-ball and 72-pin Package).....44 Figure 42. 12-Bit Color Depth RGB 4: 4: 4 Separate Sync Dual Edge Timing(81-ball and 72-pin Package) Figurc 43. 8-Bit Color Depth YC 4: 2: 2 Separate Sync Dual Edge Timing(81-ball and 72-pin Package 46 Figure 44. 10-Bit Color Depth YC 4: 2: 2 Separate Sync Dual Edge Timing(81-ball and 72-pin Package) 47 Figure 45. 12-Bit Color Depth YC 4: 2: 2 Separate Sync Dual Edge Timing(8 1-ball and 72-pin Package).....48 Figure 46 12-Bit Color Depth YC 4: 2: 2 Separate Sync nB Mode dual Edge Timing(8 1-ball and 72-pin Package).. 48 Figure 47. 16-bit Color Depth YC 4: 2: 2 Separate Sync Timing(49-ball Package) 49 Figure 488-Bit Color Depth YC 4: 2: 2 Embedded Sync Timing(49-ball Package) 50 Figure 498-Bit Color Depth YC Mux 4: 2: 2 Separate Sync Timing(49-ball Package) Figure 50 8-Bit Color Depth YC Mux 4: 2: 2 Embedded Sync Timing(49-ball Package) Figure 51 12-Bit Color Depth YC 4: 2: 2 Embedded Sync Timing(49-ball Package .53 Figure52.12- Bit Color Depth rGB/YCbCr4:4:4 Separate Sync Timing(49- ball Package)…………….54 Figure 53 8-Bit Color Depth YC 4: 2: 2 Separate Sync Dual Edge Timing(49-ball Package).........55 Figure 54 10-Bit Color Depth YC 4: 2: 2 Separate Sync dual Edge Timing(49-ball Package 56 Figure 55. 12-Bit Color Depth YC 4: 2: 2 Separate Sync Dual Edge Timing(49-ball Package) 5 Figure 56 12-Bit Color Depth YC 4: 2: 2 Separate Sync NB Mode dual Edge Timing(49-ball Package)......57 Figure57. Decoupling and Bypass Schematic……… 58 Sil-DS-1076-B C 2009 Silicon Imagc, Inc. All rights rcscrvcd CONFIDENTIAL Sig022A/Sil9024A HDMI Transmitter Data sheet Silicon Image, Inc Figure 58 Decoupling and Bypass Capacitor Placement ..... ··4·· …58 Figure 59. Transmitter to HDMI Connector Routing- Top view 59 Figure 60. Power Supply Decoupling 60 Figure 61 HDMI Port Connection Schematic Figure 62 Controller connections schematic ..62 Figurc 63. Digital Input ∴63 Figure 64. 49-ball VFBGA Package Diagram (Sil902nAYBT) Figure 65. 81-ball VFBGa Package Diagram(Sil902nARBT) .65 Figure 66. 72-pin QFN Package Diagram(Sil902nACNU) Figure67. Marking Diagram(Si902 nART)……… .67 Figure 68. Marking Diagram(Sil902nAYBT) ∴67 Figure 69. Marking Diagram(Sil902nACNU) 68 o 2009 Silicon Imagc, Inc. All rights rcscrvcd Sil-DS-1076-B CONFIDENTIAL Sig022A/Si9024A HDMI Transmitter Data sheet Silicon image. inc List of tables Table 1. Summary of Features Table 2. Color Space versus video format Table 3. YCbCr-to-RGB Color Space Conversion Formula Table4. Video Input Formats…………… 28890 Table 5. Supported mClK Frequencies Table 6. S/PDIF Audio Formats Supported for each Video Format Table 7. I-S Audio Formats Supported for each Video Format Table 8. Control of C Address with Ci2CA Signal... Table 9. absolute maximum Conditions H144 Table 10. Normal Operating Conditions.......... ························· Table 11. DC Digital I/O Specifications: IOVCC=1. 8 V 15 Table 12. DC Digital I/O Specifications: IOVCC=3.3 V Iable13.TMDsIOSpeclications.....,.,.,..…...17 Table 14. Low Power Standby mode power Consumption 17 Table 15. Operating mode power consumption 17 Table 16. Power Operating modes ·····4·············:···:·:············ 18 Table 17. TMDs AC Specifications Table18. Is Input port Timings……… Table 19. S/PDIF Input Port Timings... Table 20 Video Input AC Specifications: 1. 8-VIOVCC Table 21. video Input AC Specifications: 3.3-VIOVCC............ 20 Table 22 Control Signal Timing Specifications 2 Table 23. Minimum Horizontal Blanking Calculations Table 24. Input Video Formats Table 25. 8-Bit Color Depth RGB/YCbCr 4: 4: 4 Separate Sync Data Mapping(81-ball and 72-pin Package) Table 26. 8-Bit and 10-Bit Color Depth YC 4: 2: 2 Separate Sync Data Mapping(81-ball and 72-pin Package)..........34 Table 27. 12-Bit Color Depth YC 4: 2: 2 Separate Sync Data Mapping(81-ball and 72-pin Package)........36 Table 28 8-Bit and 10-Bit Color Depth YC 4: 2: 2 Embedded Sync Data Mapping(8l-ball and 72-pin Package)...37 Table 29 12-Bit Color Depth YC 4: 2: 2 Embedded Sync Data Mapping( 81-ball and 72-pin Package).....39 Table 30. 8-,10 and 12-Bit Color Depth YC Mux 4: 2: 2 Separate Sync Data Mapping( 81-ball and 72-pin Package)..40 Table 31.8-, 10-, and 12-Bit Color Depth YC Mux 4: 2: 2 Embedded Sync Data Mapping( 81-ball and 72-pin Package)..42 Table 32 12-Bit Color Depth YC 4: 2: 2 Embedded Sync Dual Edge Data Mapping(81-ball and 72-pin Package)...44 Table 33. 12-Bit Color Depth RGB/YCbCr 4: 4: 4 Separate Sync Dual Edge Data Mapping( &1-ball and 72-pin Package).....45 Table 34 8-Bit Color Depth YC 4: 2: 2 Separate Sync Dual Edge Data Mapping(8l-ball and 72-pin Package) .46 Table 35 10-Bit Color Depth YC 4: 2: 2 Separate Sync Dual Edge Data Mapping(81-ball and 72-pin Package)....47 Table 36 12-Bit Color Depth YC 4: 2: 2 Separate Sync Dual Edge Data Mapping( 81-ball and 72-pin Package)...48 Table 37 8-Bit Color Depth YC4: 2: 2 Separate Sync Data Mapping(49-ball Package) .49 Table 38. 8-Bit Color Depth YC 4: 2: 2 Embedded Sync Data Mapping(49-ball Package) 50 Table 39. 8-Bit Color Depth YC Mux 4: 2: 2 Separate Sync Data Mapping(49-ball Package) 51 Table40.8- Bit Color Depth YC Mux4:2:2 Embedded Sync Data Mapping(49 ball Package)………… Table 41. 12-Bit Color Depth YC4: 2: 2 Embedded Sync Dual Edge Data Mapping(49-ball Package) Table 42 12-Bit Color Depth rGB/YCbCr 4: 4: 4 Separate Sync dual Edge Data Mapping(49-ball Package)....54 Table 43 8-Bit Color Depth YC 4: 2: 2 Separate Sync Dual Edge Data Mapping(49-ball Package).......55 Table 44 10-Bit Color Depth YC 4: 2: 2 Separate Sync Dual Edge Data Mapping(49-ball Package) 56 Table 45 12-Bit Color Depth YC 4: 2: 2 Separate Sync Dual Edge Data Mapping(49-ball Package) Table 46 Referenced documents Table 47. Standards Groups Contact Information Table 48. Silicon Image Publications ···…········:·· ∴69 Sil-DS-1076-B C 2009 Silicon Imagc, Inc. All rights rcscrvcd CONFIDENTIAL Sig022A/Sil9024A HDMI Transmitter Data sheet Silicon image. Inc o 2009 Silicon Imagc, Inc. All rights rcscrvcd Sil-DS-1076-B CONFIDENTIAL Sig022A/Si9024A HDMI Transmitter Silicon Data sheet mage General Description Control Capability The Sil9022A/Sil9024A HDMI transmitter supports the Consumer Electronics Control (CeC)interface ncorporates an HDMl-compliant cec iO with High Definition Multimedia Interface(HDMi) Specification on a wide range of mobile products. High hardware protocol and arbitration logic, and definition camcorders, digital still cameras, and requires no external calibration personal mobile devices connect directly to a large Monitor detection is supported through both Hot installed base of HdMI Tvs and dvi PC monitors b Plug and Receiver Sense circuits using the flexible audio and video interfaces provided Single slave I-C from host, passing through to by this ultra-low-power solution S,PDIF or I-S inputs master I-C interface for ddc connection enable a pure digital audio connection to virtually any simplifies board layout and lowers cost system audio processor or codec. This transmitter is the Defaults to Sil9020 transmitter register-compatible next generation of its family and is an enhanced mode for operation with existing legacy software replacement for the sil9022/Sil9024 device with lower power and enhanced featurcs Digital audio Interface: The Sil9024A transmitter supports High-bandwidth Four I S inputs for Dolby Digital, DTS, or MPEG2 Digital Content Protection(HDCP) for devices that audio with programmable channel mapping require secure content delivery (49-ball package supports one I-S input) DVD-Audio input (2 or up to 8 channels) Video Input MCLK is not required for IS and S/PDIF kv YCC metadata support S/PDIF input supports 2-channel PCM or compressed BTA-T1004 video input format Dolby Digital and dts digital Integrated color space converter allows direct 2: I and 4: I down-sampling to handle 96-kHz and connection to all major MPEG decoders, including 192-kIIz audio stream those that provide only an ITU-R. 656 output Internal dE generator supports non-embedded sync Power Management formats Flexible power management with hot-plug wakeup Ultra low power requirement: less than 90 mW HDMI Output active, 150 HW standby HDMI, HDCP, and dvi compatible TMDS core runs at 165 MIlz Packaging Video resolutions up to 10%0p and UXGa (72-pin 81-ball VFBGA(4.0 x 4.0 mm) package QFN package supports 165-MHz dual-edge mode) 72-pin QFN(10 x 10 mm) package The Sil9024A transmitter is pre-programmed with 49-ball VFBGA(4.0 X 4.0 mm) package HDCP keys and has completely self-sequencing Standard part covers extended (20 to-85C) hdCP detection and authentication including temperature range SHA-I for repeaters Flash IS DAC R Audio CF/SD/MMC SDRAM S9022A HomI S/PDIF or FS HDMI Transmitter RGB/ Lens AV Media Processor TUBT-601.656 LCD Module Composite S- Viden USB User IF Figure 1. Typical Application(Sil9022A HDMI Transmitter Shown) Sil-DS-1076-B C 2009 Silicon Imagc, Inc. All rights rcscrvcd CONFIDENTIAL Sig022A/Sil9024A HDMI Transmitter Data sheet Silicon Image, Inc Comparison of the Sil9022A/Si9024A Device With Other hDMI Transmitters Table 1 summarizes the differences among the previous Silicon Image HDMI transmitters and the Sil9022A/Si19024A HDMI transmitters Table l Summary of Features HDMI Transmitter SiI9030siI9020siI9022Si9022-6si9024Si9024-6 Si19022ASil9024A Sil9022A Si19024A VFBGA OFN Video Input Clock duty cycle604060/4070307030703070307030703070307030 Max frequency 150 MHZ 84 MHZ 82.5 MHz 165 MHz 82.5 MHz 165 MHZ 165 MHz 165 MHz 165 MHz' 165 MHz Input signal level?3. V3.v 3.3Vor 33 V or 3.3 V or 3.3 V or 3.3 V or 3.3 Vor33 V or| 3.3 Vor 18V|1.8V|1.8V18V1.8V|1.8V|1.8V Audio Input Max S/PDIF 96 KHz 96 kHz 192 KHz 192 kHz 192 kHz 192 KHz 192 kHz 192 KHz 192 KHz 192 kHz frequency IS mCLK Yes required? Yes Optional Optional Optional l Optional Optional Optional Optional Optional S/PDIF MCLK Y Yes Optional Optional Optional Optional Optional Optional OptionalOptional require DDC IC Bus Voltage tolerance! 5V 5V55V5 5Vd5V 5V HDCP Encryption engine I es No Yes Auto authentication No NO N Yes Yes No Yes No Yes Other Core power supply[18v18V12V12V12V12V12V12V 1.2V O power supply.3V3.3V 3Vor 33 Vor 3.3 V 3.3 V 3.3 V or 3.3Vor 1.8V 1.8V 1.8V|4.8V 1.8V 1.8V 1.8V 84-ball 84-ball 81-ball81-ball 80-pin 84-ball TFBGA 84-ballTFBGA 84-ball/VFBGA VFBGA Package 72-pin 72-pi TQFP TFBGA 81-ballTFBGAor TFBGA OI or OFN 81-ball 49-ball 49-ball ⅤFBGA VFBGA VFBGAVFBGA Notes 1. IC inputs are 3. 3-V or 5-v tolerant only when chip IovCC is applied, except in the case of the Sil9022A/Sil9024A devices, for which the state of chip iovcc doesnt matter 2. The Sil9022A/Sil9024A 81-ball and 72-pin package supports both 1. 8-V and 3.3-V threshold-compliant operation The 49-ball package only supports 1. 8-V compliant IO. Both devices have 3.3-V tolerant 1/0 when IoVCC is 3. Supports up to 165 MHz dual-edge and single-edge modes 4. For dual-edge mode above 82. 5 MHz, only 3. 3V+ 10% can be used for IVcc c 2009 Silicon Image, Inc. All rights reserved Sil-DS-1076-B CONFIDENTIAL

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