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详细说明：max9286 gtn datasheet，解串器，4x通道输入，1xcsi2输出MAX9286
Quad 1.5Gbps GMSL Deserializer with Coax
or STP Input and Csl-2 Output
TABLE OF CONTENTS (CONTINUED)
Power-Down mode
55
Frame Sync.........…
:..55
Internal Frame SynC(FSYNCMODE =0X)
...55
External Frame Sync(FSYNCMODE = 1X)
55
G PO/GP Control
55
Configuration Link
..55
Link Masking
55
Link Startup Procedure
Applications Information
....58
Self-PRBS Test
58
Error checkin
58
ERR Output
58
Auto error reset
58
Changing the Clock Frequenc
59
Software Programming of the Device Addresses
...59
3-Level Configuration Inputs
59
Configuration Blocking
59
Compatibility with Other GMSL Devices
59
HS/VS Inversion
.59
G PIOS
..59
Internal Input pulldowns
.59
Choosing [2 C/UART Pullup Resistors
60
AC-Coupling
..60
Selection of AC-Coupling capacitors
60
Selection of Camera Frequency References
60
Power-Supply Circuits and Bypassing
60
Cables and connectors
61
Board layout
.61
ESD Protection
61
Typical Application Circuit
82
Ordering Information
82
Chip Information.......
82
Package Information
82
Revision History
83
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Maxim Integrated
MAX9286
Quad 1.5Gbps GMSL Deserializer with Coax
or STP Input and Csl-2 Output
LsT° FFIGURES
Figure 1. Reverse Control Channel Output Parameters
20
Figure 2. Test Circuit for Differential Input measurement
20
Figure 3. Test Circuit for Single-Ended Input Measurement
Figure 4 Line Fault
21
Figure 5. Worst-Case Pattern Output
22
Figure 6. 12C Timing Parameters
22
Figure 7. Deserializer Delay
....,.23
Figure 8. GPI-to-GPO Delay
23
Figure 9. Lock and camera Sync time
..23
Figure 10. Power-Up Delay
24
Figure 11 MIPI Output Timing Parameters
24
Figure 12. Frame Combination
26
Figure 13. 24-Bit Mode Serial Data Format
.....,,..,,,,..,,.....27
Figure 14. 32-Bit Mode Serial Data Format
28
Figure 15. 27-Bit High-Bandwidth Mode Serial Data Format
29
Figure 16. RAW8 Input Map
31
Figure 17. RAW10 Input Map
32
Figure 18. RAW11X2 Input Map
33
Figure 19. RAW12 Input Map
34
Figure 20. RAW12X2 Input Map
35
Figure 21. RAW14 Input Map
36
Figure 22. RAW16 Input Map
37
Figure 23. RAW20 Input Map., A.
38
Figure 24. YUV8 Input Map
39
Figure 25. YUV10 Input Map
40
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Maxim Integrated 4
MAX9286
Quad 1.5Gbps GMSL Deserializer with Coax
or STP Input and Csl-2 Output
LIST OF FIGURES (CONTINUED)
Figure 26. YUV12 Input Map
41
Figure 27. RGB565 Input Map
42
Figure 28 RGB666 Input Map
3
Figure 29. RGB888 Input Map
44
Figure 30 User-Defined 8-Bit Input Map
45
Figure 31 User-Defined 24-Bit Input Map
..46
Figure 32. GMSL UART Protocol for Base Mode
48
Figure 33. GMSL UART Data Format for Base Mode
.,,,49
Figure 34. Sync Byte(OX79)
49
Figure 36. Format Conversion Between GMSL UART and 12C with Register Address(12CMETHOD =0)
49
Figure 35 ACK Byte(OX C3)
49
Figure 37 Format Conversion Between GMSL UART and [2C Without Register Address(12CMETHOD 1)
50
Figure 38. START and STOP Conditions
51
Figure 39. Bit Transfer
51
igure 40. Acknowledge
51
Figure 41. Slave Address
52
Figure 42 Format for [2C write
52
Figure 43 Format for 12C Write to Multiple Registers o
52
Figure 44 Format for [2C Read
53
Figure 45 Example Frame Sync Operation (Automatic Mode
56
Figure 46. State Diagram
...58
Figure 47. Human Body Model ESD Test Circuit
61
Figure 49. ISo 10605 Contact Discharge ESD Test Circuit
....61
Figure 48. IEC 61000-4-2 Contact Discharge ESD Test Circuit
61
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Maxim Integrated 5
MAX9286
Quad 1.5Gbps GMSL Deserializer with Coax
or STP Input and Csl-2 Output
LsT° F TABLES
Table 1. Device Address Defaults(Register 0X09
25
Table 2. Maximum Serializer Input clock Rates
30
Table 3. Data Rate and config Selection Table(RAW8)
31
Table 4. Data Rate and Config Selection Table(RAW10)
32
Table 5. Data Rate and Config Selection Table(RAW11x2)
33
Table 6. Data Rate and Config Selection Table(RAW12)
34
Table 7. Data Rate and Config Selection Table(RAW12X2)
35
Table 8 Data Rate and Config Selection Table(RAW14)
36
Table 9 Data Rate and Config Selection Table(RAW16)
37
Table 10 Data Rate and Config Selection Table(RAW20)
38
Table 11. Data Rate and Config Selection Table(YUV8
39
Table 12 Data Rate and Config Selection Table (YUV10)
Table 13. Data Rate and Config Selection Table (YUV12)
Table 14. Data Rate and Config Selection Table(RGB565)....
42
Table 15 Data Rate and Config Selection Table(RGB666). (S
....43
Table 16 Data Rate and Contig Selection Table(RGB888)
Table 17. Data Rate and Contig Selection Table(User-Detined 8-Bit
..45
Table 18. Data Rate and Config Selection Table(User-Defined 24-Bit
46
Table 19. Data word bitwidth
47
Table 20. 12C Bit Rate Ranges
53
Table 21. Cable Equalizer boost Levels
54
Table 22. Reverse Control channel Modes
54
Table 23. Startup Procedure(see Figure 46)
56
Table 24. MAX9286 Feature Compatibe
59
Table 25 Suggested Connectors and Cables for GMSL
..60
Table 26. Suggested Connectors and Cables for GMSL
61
Table 27. Register Table
62
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Maxim Integrated
MAX9286
Quad 1.5Gbps GMSL Deserializer with Coax
or STP Input and Csl-2 Output
Absolute Maximum Ratings(Note 1)
AVDD to EP
0.5Vto+1.9V
IN+, IN-Short Circuit to Ground or Supply
Continuo
DVdD to Ep
0.5V to +1.9V Continuous Power Dissipation (TA=+70C
MAVDD to ep
.-0.5Vto+1.9V
QFND( derate427mW° C above+70°C)…………:3418mW
loVED to EP
0.5Vto+3.9V
TQFN( derate47.6 mW/C above+70°C)….3809.5mW
n+IN-to eP
-0.5v to +1. 9v Operating Temperature Range
40cto+105°C
dOUT + DOUT-CLK+, CLK- to EP
0.5V to +1.9v Junction Temperature
+150°C
MON+ MON- to EP
0.5Vto+1.9V
Storage Temperature Range
65°cto+150°C
LMn to EP (15mA current limit)
0.5to+3.9∨
Lead Temperature(soldering, 10s)
+300°C
all Other pins to eP
0.5V to +(VJOVDD +0.5v)
Soldering Temperature(reflow
+260°C
Note 1: EP connected to Pcb ground
Stresses beyond those listed under"Absolute Maximum Ratings " may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
ar any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended perods may afiect
device reliability.
Package Thermal Characteristics(Note 2)
QFND
TQFN
Junction-to-Ambient thermal resistance(』A)……6cW
Junction-to-Ambient Thermal Resistance(A)……1°c
Junction-to-Case Thermal resistance(Jc)………234°cW
Junction-to-Case Thermal Resistance(eJC
21°c/W
Note 2: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer
boardFordetailedinformationonpackagethermalconsiderationsrefertowww.maximintegrated.com/thermal-tutorial
DC Electrical Characteristics
(VAVDD=VDVDD=VMAVDD=1.7V to 1.9V, VIOVDD=1.7V to 3.6V,RL=10022+1%(differential),RL=502#1%(single-ended),EP
connected to PCB ground, TA=-40C to +105C, unless otherwise noted. Typical values are at VAVDD=VDVDD=VMAVDD=VIOVDD
=1.8V,TA=+25 C )(Note 3)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
SINGLE-ENDED INPUTS(CX/TP, HIM, 12CSEL, MS, PWDN, FRSYNC/GPI)
0.65X
High-Level Input Voltage
H
VIOVDD
0.35X
LoW-Level Input voltage
IOVDD
Input Current
-20
+20
UA
THREE-LEVEL LOGIC INPUTS (ADDO, ADD1, BWS)
0.7X
High-Level Input( Voltage
VIH
V
IOVDD
0.3x
Low-Level Input Voltage
JOVDD
Mid-Level Input Current
Open or connected to a driver with
10
output in high impedance(Note 4)
put Current
High or low
-150
+150
A
www.maximintegrated.com
Maxim Integrated
MAX9286
Quad 1.5Gbps GMSL Deserializer with Coax
or STP Input and Csl-2 Output
DC Electrical Characteristics(continued)
(VAVDD=VDVDD= VMAVDD =1.7V to 1.9V, VIOVDD =1.7V to 3.6V, RL=10022+1%(differential), RL=5022+1%(single-ended), EP
connected to PCB ground, TA=-40 C to +105 C, unless otherwise noted. Typical values are at VAVDD =VDVDD=VMAVDD= ViovDD
=1.8V, TA=+25C. (Note 3)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
SINGLE-ENDED-OUTPUTS FRSYNC/GPI)
High-Level Output Voltage
IOVDD
OH
lOH=-2mA
-0.2
LoW-Level Output voltage
V
loL 2mA
0.2
VIOVDD=3.0V to 3.6V
16
Output Short-Circuit Current
VO=OV
mA
VIOVDD=1.7V to 1.9V
12
21
OPEN-DRAIN INPUT/OUTPUTS (GPIO0, GPIO1, RX/SDA, TX/SCL
High-Level Input Voltage
0.7X
lH2
IOVDD
0.3X
LOW-Level Input Voltage
L2
VJOVDD
VIN =OV
N
RX/SDA, TX/SCL
5
Input Current
tO VIOVDD
UA
(Note 5
GPIO
-80
5
lOVED =1.7V to 1.9V
0.4
Low-Level Output Voltage
VOL2
T= 3mA
DVIOVDD=3.0V to 3.6V
0.3
Input Capacitance
N
Each pin (Note 6)
OPEN-DRAIN OUTPUTS(CCBSY, ERR. LFLT, LMO, LOCK)
VIOVDD =1.7V to 1.9V
0.4
LOw-Level Output Voltage
VOL3o N OUT= 3mA
VIOVDD =3.0V to 3.6V
0.3
nput Current
(Note 5
A
OUTPUTS FOR REVERSE CONTROL CHANNEL(IN+, IN.)
Forward
Legacy reverse control
Differential High
channel
channel mode
Output Peak Voltage
RODH
disabled
(VIN+-VIN-
(Figure 1)
High-immunity mode
100
Differential low
egacy reverse control
channel
channel mode
Output Peak Voltage,
RODI
(VIN+ VIN)
disabled
(Figure 1)
High-immunity mode
100
50
Forward
Legacy reverse control
30
Single-Ended High
channel
channel mode
Output Peak Voltage
ROSH
disabled
(Figure 1)
High-immunity mode
100
rd
60
Single-Ended Low
channel
channel mode
Output Peak Voltage
VROSL disabled
(Figure 1)
High-immunity mode
-100
50
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Maxim Integrated 8
MAX9286
Quad 1.5Gbps GMSL Deserializer with Coax
or STP Input and Csl-2 Output
DC Electrical Characteristics(continued)
(VAVDD=VDVDD= VMAVDD =1.7V to 1.9V, VIOVDD =1.7V to 3.6V, RL=10022+1%(differential), RL=5022+1%(single-ended), EP
connected to PCB ground, TA=-40 C to +105 C, unless otherwise noted. Typical values are at VAVDD =VDVDD=VMAVDD= ViovDD
=1.8V, TA=+25C. (Note 3)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
DIFFERENTIAL INPUTS(IN_+, IN-(STP MODE
Activity detector
medium threshold
60
Differential High Input
(0×3cD6:5]=01)
Threshold(Peak) Voltage,
Figure 2
N-」
Activity detector low
threshold
49
(0x3CD[6:5]=00)
Activity detector
medium threshold
Differential Low Input
(0x3cD65=01)
Threshold(Peak) Voltage
VIDL(P) Figure 2
IN+-VIN.
Activity detector low
threshold
49
(0X3CD651=00)
nput Common-Mode voltage
(y/N+))+(v/N-)
VcR
Differential Input Resistance
R
100
130
(Internal
CSl-2 OUTPUTS, HIGH-SPEED DIFFERENTIAL MODE (DOUT[3: 0], CLK_)
Transmit static Common mode
VcMIX
150
250
Voltage
VcMTX Mismatch When
Output is Differential 1 or 0
△VcMx(Note7)
Transmit Differential Voltage
D
140
270
VoD mismatch When Output is
△VoD
14
Differential 1 or o
Output High voltage
OHHS
360
m
Single-Ended Output O
40
62.5
Q
Impedance
Single-Ended Output
Mismatch of the single-ended output
10
%
Impedance Mismatch
AZosl impedance between DOUT_+ and
DOUT
CSl-2 OUTPUTS, LOW-SPEED SINGLE-ENDED MODE(DOUT[3: 0], CLK_)
Thevenin Output High
∨oH
1.05
1.2
1.3
Thevenin Output Low
VoL
50
5
n
Output Impedance of lot
Power transmitter
OLP
110
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Maxim Integrated 9
MAX9286
Quad 1.5Gbps GMSL Deserializer with Coax
or STP Input and Csl-2 Output
DC Electrical Characteristics(continued)
(VAVDD=VDVDD= VMAVDD =1.7V to 1.9V, VIOVDD =1.7V to 3.6V, RL=10022+1%(differential), RL=5022+1%(single-ended), EP
connected to PCB ground, TA=-40 C to +105 C, unless otherwise noted. Typical values are at VAVDD =VDVDD=VMAVDD= ViovDD
=1.8V, TA=+25C. (Note 3)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
MONITOR OUTPUTS (MON+, MON-)(COAX MODE
Differential Output Voltage
200
mV
Change in Vop Between
Complementary Output States
△VoD
0
mV
Output Offset Voltage
(VOUT++ VouT- )/2=Vos
(Note 7)
1.6
Change in Vos Between
0
Complementary Output States
OUT+ or VouT=OV
Output Short-Circuit Current
mA
VOUT+ or VOUT-= VAVDD
7.5
Magnitude of Differential
Output Short-Circuit Current
OSD
OD=OV
3.7
mA
Output Termination Resistance
From outt or out- AVDD
57
Q
(Internal)
SINGLE-ENDED INPUTS (N + IN
Activity detector medium
threshold
Single-Ended High Input
Threshold(Peak) voltage
VISH(P) Figure 3 A(0x3C D[6: 5]=01)
Activity detector low
threshold
36
(0x3CD[6:5]=00)
Activity detector medium
threshold
43
Single-Ended Low Input
(0x3cD6:5]=01)
Threshold(Peak) voltage
VISL(P) Figure 3
Activity detector low
threshold
(0×2cD[6:5]=00
Input Resistance(Internal)
LINE-FAULT DETECTION INPUTS (LMNO, LMN1, LMN2, LMN3)
Short-to-GND Threshold
G
Figure 4
0.3
V
Normatthreshold
VIN Figure 4
0.57
1.07
Open Threshold
TO
Figure 4
145
V
0.06
Open Input Voltage
VIO Figure 4
147
1.75
Short-to-Battery Threshold
Figure 4
2.47
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