Delta Sigma调制器非理想因素建模.pdf系统构建并研究了开关电容积分器delta sigm

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详细说明：系统构建并研究了开关电容积分器delta sigma 调制器非理想因素行为级建模第4期雷鑑铭,等 elta Sigma调制器丰理想因素建模 145 S(f=I Ho(f)12SN()+ Sold(f) (5) ⑦ MATLA配 Soldo)= Hn(f)IESN(f k gama(A) 140 k Noise PSd befor folded 145 Noisc PSD afrer folded Fig 4 Function gama(A)model in Simulink 印P江「非R「网 150 ￥1558 4.2.2 Bandwidth and slew rate 155 For the performance degradation of modulator -160 caused by bandwidth and slew rate please refer to[ 3] references. The leaky integrator shown in Fig. 5 in cludes the sl band with, saturation volta 104 and nonlinear DC Gain Fig 6 is the non-ideal modu lator considering all the non-idealities proposed above ig. 3 Noise PDF before and after folded 4.2 Leaky integrator gana MATLAB 4.2.1 Nonlinear DC Gain Function Inte. gain Product slew Fcrl U Saturation Out Although finite dC gain changes the integrator's gain and alters the dominant pole position, it does not alfa directly cause distortion. Harmonic distortion is in Subsystem troduced by the integrators nonlinear op amp dc Gain resulting from its dependency on the output Fig 5 Non-ideal integrator model in Simulink voltage. The nonlinear DC gain is an even function of 5 Simulation Results output voltage and will hence introduce odd harmonic distortion, as will be seen in the Simulation section All the proposed models have been utilized for of this paper. The precise transfer function is given in the simulation Tablel compares the SnDR obtained referances8J, but in this paper, an altered transfer having an input signal of 0. 2v, 2.67 kIIz with re f speLs to 5V supply voltage unction own by(8)is chosen for the feasible Fig 7 compares the output PSd caused separate molding A 2Ao(1-a1l Vol-a2l Vol2-a3lVo ly by colored noise, thermal noise with that of the ideal one. Compared with the thermal noise, which just introduce an added value in output Psd, the col H(z)=k(1 1+k。+k A ored noises with the flicker noise considered strongly 1(1-A increase the signal band noise floor. This guides the k sama(A) designer to reduce op amp noise especially low fre 1-alfa(a) x (8) quency flicker noise using large input MOS area or In equation(8),ks=Cu/Ci, op amp non-lin correlated-double-sampled( CUs) integrators. The ear dc gain a is given by (7) and should be related to odd harmonic distortion is given by Fig. 8, and it output at the same time. Since the available output is willgive a more precise prediction on op amp output gne sampling period before, we can use Vo=Vo(n rang. Fig 9 shows SNR curve line affected by satura- 1)+kevin(n-1)to replace Vo in(7)approxi tion voltage and it requires saturation voltage should mately. As a result, gama(A), alfa(a) are timc be larger than 1V. preceded functions. Function gama(A) is similar to alfa(a ) shown in Fig 4 146 微电子学与计算机 2008年 /C noise Gainl IDEAL Integrator Relay To Workspace with Delay)1 nolinear DCgain GBW put signal saturation and SR Sampling Colored Noise k TC IN kTC noise l alt2 Switch Non-Linearity Fig 6 Non-ideal model of second order modulator Table 1 Performance degradation caused by different snr ys inputamp, Amax =0.7 non-id calitiesnon-idealitics O0 H-snr Ys inputamP,Amax-15V SNdR Resolution non-idealities /dB /bit Ideal model 99.516.23 Saturation=0. 8V Cok nose 84.313.7 Nonlinear DC Gain(60dB), Saturation 98.916.14 saturation=0.7Y W(12MH),SR(100V/s) 98.316.03 Sampling thermal noise(Cs=2. 5pF)91.3 14.88 k jitter(1se-9s) 95.215.53 ∫/Hz All the above non-idealities 83.513.58 Fig 9 oput signal voltage 6 Conclusions -50 colored hoise I In thi olete model of delta gma l00 modulator including switch sampling noise, nonlinear on-resistance, clock jitter, op anp dc gain and its Termal noise nonlinearity, bandwidth, saturation output voltage 200 Ideal model limiting slew rate, colored noise, quantizer capacitor 250 aLu LLL mismatch and offset voltage are presented The effect 104 of nonlinear dc gain has been modeled and simulation Fig 7 Effects of modulator PSD caused results shows that it will introduce odd harmonic dis- by the cored noise, thermal noise tortion. All these non-idealities'models give a more precise estimation of the modulator in a fairly short Fin-2.67kE simulation time and is also available in high order modulators 号 a Third distortion 120 参考文献: [1]黄薇郑十源.24位高精度音频Σ ADACLJ].微电子学 160 与计算机,207,24(1):15-24 [2]Piero Malcovati, Brigati S, Francesconi F, et al 05106 ioral modeling of switched- capacitor sigma-delta morula f/H tors[ J]. IEEE transactions on circuits and systems-II Fig 8 Odd harmonic distortion caused by 2003,50(4):237-242 op amp nonlinear DC gain (下转第151页) 第4期范兵等:种开环流水线A/D转换器的系统伤真 151 件后,进行非理想情况仿真,再对理想DAC的输出下各模块参数对系统性能的影响进行静态特性分析,得出系统的微分非线性和积分非线性图.如图10所示,DN1为0.45LSB,INL为参考文献: 0.44LSB,均在ILSB范围内 [1] Maloberti F, Estrada P, Valero A, et al. Behavioral mod- DIFFERENTIAL NONINEARIT Y Y8, DIGITAL OUTPUT CODE eling and simulation of data converters[c]// Circuits and ML:10.459 ystem,1992.Ⅴiena, Austria,2000(5):2144-214 4计N [2]Razavi B. Principles of data conversion system design[ M] w Yor 1995 200 250 [3]Ja· Hyun K∞o,Yun- Jeong Kim. An8-bt250MsPs DIGITAL OUTPUT CODE )差分非线性 CMOS pipelined ADC using open-loop architecture[ c S Os INTEGRAL NONLINEARITY vs.DIGITALOUTPUT CODE 2004 IEEE Asia- Pacific Conference on Advanced System wM产H Integrated Circuits. South Korea, Seoul: Korea universi IN=0.44 [4] Rudy van de Plassche. Cmos Integrated Analog-to-Digi DIGITAL OUTPUT CoDE tal and Digital-to-analog Converters [M]. 2nd ed b)积分非线性 Netherlands: Kluwer Academic Publishers, 2003: 22-25 [5 Lewis S H, Gray PR. A pipclinc SMsamplc/s9 bit 图10NL和DNL特性图 to-digital convertcrLJ]. IEEE Journal of solid-statc circuits,1987,SC-22:954-961 5结束语 oey fiberg ng Lee, David A Ho ul 文中通过对开环流水线结构的分析,对影响系 speed testing of A/d converters[J]. IEEE Jc oUta o 统性能的主要参数以及非线性因素进行了深入研 solid-state circuits, 1984, SC-19(6): 820-827 究,使用 MATLAB/SIMULINK对系统的主要模块7殷湛郭立杨吉庆一种用于流水线AC的高速电压比较器[J]微电子学与计算机,2006,23(2):182-184 进行数学建模,并利用搭建的测试平台,对一个8 位250MH采样频率的开环流水线结构A转换作者筒介: 器进行了理想情沉仿真,验证了系统结构,并通过对范兵男,(1980-),博士研究生研究方向为混合信号加入非理想因素后的系统仿真,分析了非理想情况处理高速模数转换器 (上接第146页) [3]Hashem Zare-Hoseini, Izzet Kale, Omid Shoaei. Model cuits and systems-TL, 2001, 48 (2): 151-157 ing of switched- capacitor delta- sigma modulators in [7] Christian C ENZ, Gabor C Temes. Circuit techniques fo SIMULINK[J]. IEEE transactions on instrumentati reducing the effects of op-amp imperfections autozeroing and measurement,2005,54(4);1646-1654 correlated double sampling, and chopper stabilization[Jj [4 Fomasari A, Malcovati P, Malaberti F. Improved modcl IEEE,1996,84(11):1584-1614 ing of sigma-delta modulator non-idealities in simulink [8] Fang Lieyi. A high-speed, high-resolution sigma-dclti [J]. IEEE Circuits and Systems, 2005, 6(5):5982 modulator analog-to-digital converter D]. USA: Texas 5985 Tech University, 2004: 89--116 [5]沈佳铭,洪亮,石春琦,等.一种可重构的24Σ_△调制器的设计[.微电子学与计算机,2007,24(4):159-作者简介: 雷鑑铭男,副教授研究方向为数模混合集成电路与设计 [6] Hui Tian, Abbas el gamal. Analysis of1 f noise in代小伍男,硕上研究生,研究方向为数模混合集成电路 switched MOSFET circuits小]. IEEE transactions on cir- Delta Sigm2A/D转换器设计

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