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详细说明:National_Semiconductor的一款网络芯片的技术手册。1.0 Pin Descriptions
m
9
1.1 Serial Management Interface
9
1.2 MAC Data Interface
.9
1.3 Clock Interface
11
1. 4 LED Interface
1.5 Reset and Power down
12
1.6 Strap Options
12
1.7 10 Mb/s and 100 Mb/s PMD Interface
14
1.8 Special Connections
14
1. 9 Power Supply Pi
14
1. 10 Package Pin AsSi
15
2.0 Configuration
16
2. 1 Auto-Negotiation
g
16
2.1.1 Auto-Negotiation Pin Control
16
2.1.2 Auto-Negotiation Register Control
16
2.1.3 Auto-Negotiation Parallel Detection
2. 1. 4 Auto-Negotiation Restart
2.1.5 Enabling Auto-Negotiation via Software
17
2.1.6 Auto-Negotiation Complete Time
17
2.2 Auto-MDIX
2. 3 PHY Address
18
2.3.1 Mll Isolate mode
2.4 LED Interface
19
2.4.1LED
19
2.4.2 LED Direct Control
2.5 Half Duplex VS Full Duplex
20
2.6 Internal Loopback
20
2.7 BIST
20
3.0 Functional Description
.I.I...
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3.1 Mll Interface
3.1.1 Nibble-wide mll data Interface
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3.1.2 Collision detect
3.1.3 Carrier Sense
21
3.2 Reduced mll Interface
3.3 10 Mb Serial Network Interface(SNI)
.22
3. 4 802.3u Mll Serial Management Interface
3.4.1 Serial Management Register Access
3.4.2 Serial Management Access protocol
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3.4.3 Serial Management Preamble Suppression
4.0 Architecture
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4.1100BASE-TX TRANSMITTER
.24
4.1. 1 Code-group Encoding and Injection
26
4.1.2 Scrambler
26
4.1 3 Nrz to nrzi Encoder
26
4.1. 4 Binary to MLT-3 Convertor
26
4.2100 BASE-T×RECEⅣVER
26
4.2.1 Analog Front Et
26
4.2.2 Digital Signal Processor
26
4.2.2.1 Digital Adaptive Equalization and gain Control
28
4.2.2.2 Base Line Wander Compensation
4.2.3 Signal detect
4.2.4 MLT-3 to nrzi Decoder
4,25 nrz to nrz
4.2.6 Serial to parallel
4.2.7 Descrambler
4.2.8 Code-group Alignment
4.29 4B/5B Decoder
4.2. 10 100BASE-TX Link Integrity Monitor
..30
42. 11 Bad ssD Detection
.30
www.national.com
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4.3 10BASE-T TRANSCEIVER MODULE
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4.3.1 Operational Modes
30
4.3.2 Smart squelch
31
4.3.3 Collision Detection and sQE
4.3.4 Carrier Sense
31
4.3.5 Normal Link Pulse detection/Generation
4.3.6 Ja
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