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USB30 Universal Serial Bus 3.0 Specification pdf it is free
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上传时间: 2010-04-18
详细说明： 以下的资源也很不错, 加减可以看一下o 使用C++制作戰車射擊-100%提供源码 http://download.csdn.net/source/2257663 使用C++制作3D动画人物-100%提供源码 http://download.csdn.net/source/2255453 Linux kernel 每一行都完全注释-初学者必备 http://download.csdn.net/source/1982431 Programming Embedded Systems 2nd http://download.csdn.net/source/1982338 J2ME pdf and code 郭克华 http://download.csdn.net/source/2229809 C语言程序设计(Visual+C 6.0环境) http://download.csdn.net/source/2232878 Visual C++ 60 MFC + code 学习最强宝典 http://download.csdn.net/source/2236266 ASP.NET Web (第一次亲密接触ASP.NET) http://downloa d.csdn.net/source/2241466 1 Introduction 1-1 11 Motivation 1-1 12 Objective of the Specification 1-2 13 Scope of the Document1-2 14 USB Product Compliance1-2 15 Document Organization1-3 16 Design Goals1-3 17 Related Documents1-3 2 Terms and Abbreviations 2-1 3 USB 30 Architectural Overview 3-1 31 USB 30 System Description 3-1 311 USB 30 Physical Interface3-2 3111 USB 30 Mechanical3-2 312 USB 30 Power 3-3 313 USB 30 System Configuration3-3 314 USB 30 Architecture Summary3-3 32 SuperSpeed Architecture 3-4 321 Physical Layer 3-5 322 Link Layer 3-6 323 Protocol Layer3-7 324 Robustness3-8 3241 Error Detection 3-8 3242 Error Handling 3-9 325 SuperSpeed Power Management3-9 326 Devices3-10 3261 Peripheral Devices 3-10 3262 Hubs3-11 327 Hosts 3-12 328 Data Flow Models3-12 4 SuperSpeed Data Flow Model 4-1 41 Implementer Viewpoints 4-1 42 SuperSpeed Communication Flow4-1 421 Pipes4-2 43 SuperSpeed Protocol Overview 4-2 431 Differences from USB 204-2 4311 Comparing USB 20 and SuperSpeed Transactions4-3 4312 Introduction to SuperSpeed Packets4-4 44 Generalized Transfer Description4-4 441 Data Bursting4-5 442 IN Transfers4-5 443 OUT Transfers4-6 444 Power Management and Performance4-7 Universal Serial Bus 30 Specification, Revision 10 viii 445 Control Transfers4-8 4451 Control Transfer Packet Size 4-8 4452 Control Transfer Bandwidth Requirements 4-8 4453 Control Transfer Data Sequences4-9 446 Bulk Transfers4-9 4461 Bulk Transfer Data Packet Size 4-9 4462 Bulk Transfer Bandwidth Requirements4-10 4463 Bulk Transfer Data Sequences 4-10 4464 Bulk Streams4-11 447 Interrupt Transfers 4-12 4471 Interrupt Transfer Packet Size 4-13 4472 Interrupt Transfer Bandwidth Requirements 4-13 4473 Interrupt Transfer Data Sequences4-14 448 Isochronous Transfers4-14 4481 Isochronous Transfer Packet Size 4-15 4482 Isochronous Transfer Bandwidth Requirements 4-15 4483 Isochronous Transfer Data Sequences4-16 449 Device Notifications 4-16 4410 Reliability 4-16 44101 Physical Layer4-16 44102 Link Layer4-16 44103 Protocol Layer 4-17 4411 Efficiency 4-17 5 Mechanical 5-1 51 Objective 5-1 52 Significant Features5-1 521 Connectors 5-1 5211 USB 30 Standard-A Connector 5-2 5212 USB 30 Standard-B Connector 5-2 5213 USB 30 Powered-B Connector 5-2 5214 USB 30 Micro-B Connector5-2 5215 USB 30 Micro-AB and USB 30 Micro-A Connectors5-3 522 Compliant Cable Assemblies5-3 523 Raw Cables 5-3 53 Connector Mating Interfaces 5-4 531 USB 30 Standard-A Connector5-4 5311 Interface Definition 5-4 5312 Pin Assignments and Description 5-14 5313 USB 30 Standard-A Connector Color Coding 5-14 532 USB 30 Standard-B Connector5-15 5321 Interface Definition 5-15 5322 Pin Assignments and Description 5-20 533 USB 30 Powered-B Connector5-20 5331 Interface Definition 5-20 5332 Pin Assignments and Descriptions5-25 534 USB 30 Micro Connector Family 5-25 5341 Interfaces Definition 5-25 5342 Pin Assignments and Description 5-33 Contents ix 54 Cable Construction and Wire Assignments5-35 541 Cable Construction 5-35 542 Wire Assignments5-36 543 Wire Gauges and Cable Diameters 5-36 55 Cable Assemblies5-37 551 USB 30 Standard-A to USB 30 Standard-B Cable Assembly5-37 552 USB 30 Standard-A to USB 30 Standard-A Cable Assembly5-38 553 USB 30 Standard-A to USB 30 Micro-B Cable Assembly 5-39 554 USB 30 Micro-A to USB 30 Micro-B Cable Assembly 5-41 555 USB 30 Micro-A to USB 30 Standard-B Cable Assembly 5-43 556 USB 30 Icon Location5-44 557 Cable Assembly Length5-45 56 Electrical Requirements 5-46 561 SuperSpeed Electrical Requirements5-46 5611 Raw Cable5-46 56111 Characteristic Impedance5-46 56112 Intra-Pair Skew5-46 56113 Differential Insertion Loss5-47 5612 Mated Connector5-47 5613 Mated Cable Assemblies 5-48 56131 Differential Insertion Loss (EIA-360-101) 5-49 56132 Differential Near-End Crosstalk between SuperSpeed Pairs (EIA-360-90)5-50 56133 Differential Crosstalk between D+/D- and SuperSpeed Pairs (EIA-360-90)5-51 56134 Differential-to-Common-Mode Conversion5-52 562 DC Electrical Requirements5-52 5621 Low Level Contact Resistance (EIA 364-23B) 5-52 5622 Dielectric Strength (EIA 364-20) 5-52 5623 Insulation Resistance (EIA 364-21)5-53 5624 Contact Current Rating (EIA 364-70, Method 2) 5-53 57 Mechanical and Environmental Requirements5-53 571 Mechanical Requirements 5-53 5711 Insertion Force (EIA 364-13)5-53 5712 Extraction Force (EIA 364-13)5-53 5713 Durability or Insertion/Extraction Cycles (EIA 364-09) 5-53 5714 Cable Flexing (EIA 364-41, Condition I)5-54 5715 Cable Pull-Out (EIA 364-38, Condition A)5-54 5716 Peel Strength (USB 30 Micro Connector Family Only) 5-54 5717 4-Axes Continuity Test (USB 30 Micro Connector Family Only) 5-54 5718 Wrenching Strength (Reference, USB 30 Micro Connector Family Only) 5-56 5719 Lead Co-Planarity 5-56 57110 Solderability5-56 57111 Restriction of Hazardous Substances (RoHS) Compliance 5-56 572 Environmental Requirements 5-56 Universal Serial Bus 30 Specification, Revision 10 x 573 Materials 5-57 58 Implementation Notes and Design Guides5-57 581 Mated Connector Dimensions 5-57 582 EMI Management 5-60 583 Stacked Connectors 5-60 6 Physical Layer 6-1 61 Physical Layer Overview 6-1 62 Physical Layer Functions 6-1 621 Measurement Overview6-4 622 Channel Overview 6-5 63 Symbol Encoding 6-5 631 Serialization and Deserialization of Data6-6 632 Normative 8b/10b Decode Rules6-6 633 Data Scrambling 6-6 634 8b/10b Decode Errors6-7 635 Special Symbols for Framing and Link Management 6-8 64 Link Initialization and Training 6-8 641 Normative Training Sequence Rules6-9 6411 Training Control Bits6-9 6412 Training Sequence Values 6-9 642 Lane Polarity Inversion 6-11 643 Elasticity Buffer and SKP Ordered Set 6-11 644 Compliance Pattern 6-12 65 Clock and Jitter6-13 651 Informative Jitter Budgeting 6-13 652 Normative Clock Recovery Function 6-14 653 Normative Spread Spectrum Clocking (SSC)6-16 654 Normative Slew Rate Limit 6-16 66 Signaling6-17 661 Eye Diagrams 6-17 662 Voltage Level Definitions 6-18 663 Tx and Rx Input Parasitics6-19 67 Transmitter Specifications 6-20 671 Transmitter Electrical Parameters 6-20 672 Low Power Transmitter6-21 673 Transmitter Eye 6-22 674 Tx Compliance Reference Receiver Equalize Function 6-22 675 Informative Transmitter De-emphasis6-23 676 Entry into Electrical Idle, U16-23 68 Receiver Specifications 6-24 681 Receiver Equalization Training6-24 682 Informative Receiver CTLE Function6-24 683 Receiver Electrical Parameters 6-26 684 Receiver Loopback6-27 6841 Loopback BERT6-27 685 Normative Receiver Tolerance Compliance Test 6-29 69 Low Frequency Periodic Signaling (LFPS)6-30 691 LFPS Signal Definition6-30 Contents xi 692 Example LFPS Handshake for U1/U2 Exit, Loopback Exit, and U3 Wakeup 6-33 693 Warm Reset6-34 610 Transmitter and Receiver DC Specifications6-35 6101 Informative ESD Protection 6-35 6102 Informative Short Circuit Requirements6-35 6103 Normative High Impedance Reflections 6-35 611 Receiver Detection 6-36 6111 Rx Detect Overview 6-36 6112 Rx Detect Sequence6-37 6113 Upper Limit on Channel Capacitance6-37 7 Link Layer 7-1 71 Byte Ordering 7-2 72 Link Management and Flow Control7-3 721 Packets and Packet Framing7-3 7211 Header Packet Structure7-3 72111 Header Packet Framing 7-3 72112 Packet Header7-4 72113 Link Control Word7-6 7212 Data Packet Payload Structure 7-7 72121 Data Packet Payload Framing7-7 72122 Data Packet Payload7-8 72123 Spacing Between Data Packet Header and Data Packet Payload7-10 722 Link Commands7-10 7221 Link Command Structure 7-10 7222 Link Command Word Definition 7-11 7223 Link Command Placement 7-14 723 Logical Idle7-14 724 Link Command Usage for Flow Control, Error Recovery, and Power Management7-15 7241 Header Packet Flow Control and Error Recovery 7-15 72411 Initialization7-15 72412 General Rules of LGOOD_n and LCRD_x Usage7-18 72413 Transmitting Header Packets 7-18 72414 Receiving Header Packets 7-18 72415 Rx Header Buffer Credit 7-19 72416 Receiving Data Packet Payload 7-19 72417 Receiving LGOOD_n7-20 72418 Receiving LCRD_x 7-20 72419 Receiving LBAD 7-20 724110 Transmitter Timers 7-21 7242 Link Power Management and Flow7-22 72421 Power Management Link Timers7-22 72422 Low Power Link State Initiation 7-23 72423 U1/U2 Entry Flow 7-24 72424 U3 Entry Flow7-25 72425 Concurrent Low Power Link Management Flow7-25 Universal Serial Bus 30 Specification, Revision 10 xii 72426 Concurrent Low Power Link Management and Recovery Flow7-26 72427 Low Power Link State Exit Flow 7-26 73 Link Error Rules/Recovery 7-26 731 Overview of SuperSpeed Bit Errors7-26 732 Link Error Types, Detection, and Recovery 7-27 733 Header Packet Errors 7-27 7331 Packet Framing Error 7-27 7332 Header Packet Error 7-28 7333 Rx Header Sequence Number Error 7-28 734 Link Command Errors7-28 735 ACK Tx Header Sequence Number Error7-30 736 Header Sequence Number Advertisement Error 7-30 737 Rx Header Buffer Credit Advertisement Error 7-30 738 Training Sequence Error7-31 739 8b/10b Errors7-31 7310 Summary of Error Types and Recovery 7-31 74 PowerOn Reset and Inband Reset7-33 741 PowerOn Reset 7-33 742 Inband Reset 7-33 75 Link Training and Status State Machine (LTSSM) 7-35 751 SSDisabled7-38 7511 SSDisabled Requirements 7-38 7512 Exit from SSDisabled 7-38 752 SSInactive7-38 7521 SSInactive Substate Machines 7-38 7522 SSInactive Requirements7-38 7523 SSInactiveQuiet 7-39 75231 SSInactiveQuiet Requirements 7-39 75232 Exit from SSInactiveQuiet 7-39 7524 SSInactiveDisconnectDetect7-39 75241 SSInactiveDisconnectDetect Requirements7-39 75242 Exit from SSInactiveDisconnectDetect 7-39 753 RxDetect7-40 7531 RxDetect Substate Machines7-40 7532 RxDetect Requirements 7-40 7533 RxDetectReset 7-41 75331 RxDetectReset Requirements7-41 75332 Exit from RxDetectReset 7-41 7534 RxDetectActive7-41 7535 RxDetectActive Requirements 7-41 7536 Exit from RxDetectActive 7-41 7537 RxDetectQuiet7-42 75371 RxDetectQuiet Requirements7-42 75372 Exit from RxDetectQuiet7-42 754 Polling7-43 7541 Polling Substate Machines7-43 7542 Polling Requirements 7-43 7543 PollingLFPS 7-43 Contents xiii 75431 PollingLFPS Requirements 7-43 75432 Exit from PollingLFPS 7-43 7544 PollingRxEQ7-44 75441 PollingRxEQ Requirements7-44 75442 Exit from PollingRxEQ7-44 7545 PollingActive7-44 75451 PollingActive Requirements 7-45 75452 Exit from PollingActive7-45 7546 PollingConfiguration 7-45 75461 PollingConfiguration Requirements7-45 75462 Exit from PollingConfiguration 7-45 7547 PollingIdle7-46 75471 PollingIdle Requirements 7-46 75472 Exit from PollingIdle7-46 755 Compliance Mode7-47 7551 Compliance Mode Requirements7-48 7552 Exit from Compliance Mode 7-48 756 U0 7-48 7561 U0 Requirements 7-48 7562 Exit from U0 7-48 757 U1 7-49 7571 U1 Requirements 7-49 7572 Exit from U1 7-50 758 U2 7-50 7581 U2 Requirements 7-50 7582 Exit from U2 7-51 759 U3 7-51 7591 U3 Requirements 7-51 7592 Exit from U3 7-52 7510 Recovery7-52 75101 Recovery Substate Machines 7-53 75102 Recovery Requirements7-53 75103 RecoveryActive 7-53 751031 RecoveryActive Requirements 7-53 751032 Exit from RecoveryActive 7-53 75104 RecoveryConfiguration7-53 751041 RecoveryConfiguration Requirements 7-54 751042 Exit from RecoveryConfiguration7-54 75105 RecoveryIdle 7-54 751051 RecoveryIdle Requirements 7-54 751052 Exit from RecoveryIdle 7-55 7511 Loopback 7-56 75111 Loopback Substate Machines 7-56 75112 Loopback Requirements 7-56 75113 LoopbackActive7-56 751131 LoopbackActive Requirements7-56 751132 Exit from LoopbackActive7-56 75114 LoopbackExit7-57 751141 LoopbackExit Requirements7-57 Universal Serial Bus 30 Specification, Revision 10 xiv 751142 Exit from LoopbackExit7-57 7512 Hot Reset7-58 75121 Hot Reset Substate Machines7-58 75122 Hot Reset Requirements7-58 75123 Hot ResetActive 7-58 751231 Hot ResetActive Requirements 7-58 751232 Exit from Hot ResetActive7-59 75124 Hot ResetExit 7-59 751241 Hot ResetExit Requirements 7-59 751242 Exit from Hot ResetExit 7-60 8 Protocol Layer 8-1 81 SuperSpeed Transactions8-2 82 Packet Types8-2 83 Packet Formats 8-4 831 Fields Common to all Headers 8-4 8311 Reserved Values and Reserved Field Handling 8-4 8312 Type Field 8-4 8313 CRC-16 8-4 8314 Link Control Word 8-5 84 Link Management Packet (LMP) 8-5 841 Subtype Field8-6 842 Set Link Function8-6 843 U2 Inactivity Timeout 8-7 844 Vendor Device Test 8-8 845 Port Capabilities8-8 846 Port Configuration8-10 847 Port Configuration Response8-11 85 Transaction Packet (TP)8-12 851 Acknowledgement (ACK) Transaction Packet8-12 852 Not Ready (NRDY) Transaction Packet 8-14 853 Endpoint Ready (ERDY) Transaction Packet 8-14 854 STATUS Transaction Packet8-15 855 STALL Transaction Packet8-16 856 Device Notification (DEV_NOTIFICATION) Transaction Packet 8-16 8561 Function Wake Device Notification 8-17 8562 Latency Tolerance Message (LTM) Device Notification 8-18 8563 Bus Interval Adjustment Message Device Notification 8-19 8564 Function Wake Notification 8-19 8565 Latency Tolerance Messaging 8-19 85651 Optional Normative LTM and BELT Requirements 8-20 8566 Bus Interval Adjustment Message8-20 857 PING Transaction Packet 8-22 858 PING_RESPONSE Transaction Packet 8-22 86 Data Packet (DP) 8-23 87 Isochronous Timestamp Packet (ITP) 8-24 88 Addressing Triple 8-25 Contents xv 89 Route String Field8-26 891 Route String Port Field 8-26 892 Route String Port Field Width 8-26 893 Port Number 8-26 810 Transaction Packet Usages 8-26 8101 Flow Control Conditions8-27 8102 Burst Transactions8-27 8103 Short Packets 8-28 811 TP or DP Responses8-29 8111 Device Response to TP Requesting Data 8-29 8112 Host Response to Data Received from a Device 8-30 8113 Device Response to Data Received from the Host 8-31 8114 Device Response to a SETUP DP8-32 812 TP Sequences8-33 8121 Bulk Transactions 8-33 81211 State Machine Notation Information8-33 81212 Bulk IN Transactions 8-34 81213 Bulk OUT Transactions 8-35 81214 Bulk Streaming Protocol8-38 812141 Stream IDs 8-39 812142 Bulk IN Stream Protocol 8-40 812143 Bulk OUT Stream Protocol 8-44 8122 Control Transfers8-48 81221 Reporting Status Results 8-50 81222 Variable-length Data Stage 8-51 81223 STALL TPs Returned by Control Pipes8-51 8123 Bus Interval and Service Interval 8-51 8124 Interrupt Transactions8-52 81241 Interrupt IN Transactions8-52 81242 Interrupt OUT Transactions8-55 8125 Host Timing Information8-58 8126 Isochronous Transactions8-60 81261 Host Flexibility in Performing Isochronous Transactions8-66 81262 Device Response to Isochronous IN Transactions 8-66 81263 Host Processing of Isochronous IN Transactions 8-66 81264 Device Response to an Isochronous OUT Data Packet8-67 813 Timing Parameters 8-68 9 Device Framework 9-1 91 USB Device States9-1 911 Visible Device States9-1 9111 Attached 9-5 9112 Powered9-5 9113 Default9-5 9114 Address9-6 9115 Configured9-6 9116 Suspended9-6 Universal Serial Bus 30 Specification, Revision 10 xvi 912 Bus Enumeration 9-6 92 Generic Device Operations 9-7 921 Dynamic Attachment and Removal 9-7 922 Address Assignment9-8 923 Configuration 9-8 924 Data Transfer9-9 925 Power Management9-9 9251 Power Budgeting9-9 9252 Changing Device Suspend State 9-9 9253 Function Suspend 9-10 9254 Changing Function Suspend State 9-10 926 Request Processing9-10 9261 Request Processing Timing 9-11 9262 Reset/Resume Recovery Time 9-11 9263 Set Address Processing9-11 9264 Standard Device Requests 9-11 9265 Class-specific Requests9-12 9266 Speed Dependent Descriptors 9-12 927 Request Error 9-12 93 USB Device Requests9-13 931 bmRequestType 9-13 932 bRequest 9-14 933 wValue9-14 934 wIndex 9-14 935 wLength 9-15 94 Standard Device Requests9-15 941 Clear Feature9-18 942 Get Configuration9-19 943 Get Descriptor9-19 944 Get Interface9-20 945 Get Status9-21 946 Set Address 9-23 947 Set Configuration9-24 948 Set Descriptor 9-24 949 Set Feature9-25 9410 Set Interface 9-27 9411 Set Isochronous Delay9-27 9412 Set SEL 9-28 9413 Synch Frame 9-29 95 Descriptors 9-29 96 Standard USB Descriptor Definitions 9-30 961 Device9-30 962 Binary Device Object Store (BOS)9-32 9621 USB 20 Extension 9-33 9622 SuperSpeed USB Device Capability 9-34 9623 Container ID 9-36 963 Configuration 9-36 964 Interface Association 9-38 965 Interface9-39 Contents xvii 966 Endpoint 9-41 967 SuperSpeed Endpoint Companion 9-45 968 String 9-47 97 Device Class Definitions9-48 971 Descriptors9-48 972 Interface(s)9-48 973 Requests9-48 10 Hub, Host Downstream Port, and Device Upstream Port Specification 10-1 101 Hub Feature Summary 10-1 1011 SuperSpeed Capable Host with SuperSpeed Capable Software 10-4 1012 USB 20 Host10-4 1013 Hub Connectivity10-5 10131 Packet Signaling Connectivity10-5 10132 Routing Information10-6 1014 Resume Connectivity10-8 1015 Hub Fault Recovery Mechanisms10-8 1016 Hub Header Packet Buffer Architecture10-9 10161 Hub Data Buffer Architecture 10-9 102 Hub Power Management10-10 1021 Link States10-10 1022 Hub Downstream Port U1/U2 Timers 10-10 1023 Downstream/Upstream Port Link State Transitions10-11 103 Hub Downstream Facing Ports 10-11 1031 Hub Downstream Facing Port State Descriptions 10-13 10311 DSPORTPowered-off10-13 10312 DSPORTDisconnected (Waiting for SS Connect)10-14 10313 DSPORTTraining 10-14 10314 DSPORTERROR 10-15 10315 DSPORTEnabled10-15 10316 DSPORTResetting10-15 10317 DSPORTCompliance 10-16 10318 DSPORTLoopback10-16 10319 DSPORTDisabled 10-16 1032 Disconnect Detect Mechanism 10-16 1033 Labeling 10-16 104 Hub Downstream Facing Port Power Management 10-16 1041 Downstream Facing Port PM Timers10-17 1042 Hub Downstream Facing Port State Descriptions 10-19 10421 Enabled U0 States 10-19 10422 Attempt U0 – U1 Transition10-20 10423 Attempt U0 – U2 Transition10-20 10424 Link in U1 10-21 10425 Link in U2 10-21 10426 Link in U3 10-21 105 Hub Upstream Facing Port10-22 1051 Upstream Facing Port State Descriptions10-23 10511 USPORTPowered-off10-23 Universal Serial Bus 30 Specification, Revision 10 xviii 10512 USPORTPowered-on10-24 10513 USPORTTraining 10-24 10514 USPORTConnected10-24 10515 USPORTError 10-24 10516 USPORTEnabled10-24 1052 Hub Connect State Machine10-25 10521 Hub Connect State Descriptions 10-25 10522 HCONNECTPowered-off 10-25 10523 HCONNECTAttempt SS Connect 10-25 10524 HCONNECTConnected on SS10-25 106 Upstream Facing Port Power Management 10-26 1061 Upstream Facing Port PM Timer 10-28 1062 Hub Upstream Facing Port State Descriptions10-28 10621 Enabled U0 States 10-28 10622 Attempt U0 – U1 Transition10-29 10623 Attempt U0 – U2 Transition10-30 10624 Link in U1 10-30 10625 Link in U2 10-30 10626 Link in U3 10-30 107 Hub Header Packet Forwarding and Data Repeater10-31 1071 Hub Elasticity Buffer 10-31 1072 SKP Ordered Sets 10-31 1073 Interpacket Spacing10-31 1074 Header Packet Buffer Architecture 10-31 1075 Upstream Facing Port Tx10-34 1076 Upstream Facing Port Tx State Descriptions10-35 10761 Tx IDLE 10-35 10762 Tx Header 10-35 10763 Tx Data10-35 10764 Tx Data Abort 10-36 10765 Tx Link Command 10-36 1077 Upstream Facing Port Rx 10-37 1078 Upstream Facing Port Rx State Descriptions 10-37 10781 Rx Default 10-37 10782 Rx Data 10-38 10783 Rx Header 10-38 10784 Process Header Packet 10-38 10785 Rx Link Command10-40 10786 Process Link Command10-40 1079 Downstream Facing Port Tx 10-41 10710 Downstream Facing Port Tx State Descriptions 10-42 107101 Tx IDLE 10-42 107102 Tx Header 10-42 107103 Tx Data10-42 107104 Tx Data Abort 10-43 107105 Tx Link Command 10-43 10711 Downstream Facing Port Rx10-44 10712 Downstream Facing Port Rx State Descriptions10-45 107121 Rx Default 10-45 Contents xix 107122 Rx Data 10-45 107123 Rx Header 10-45 107124 Process Header 10-46 107125 Rx Link Command10-46 107126 Process Link Command10-47 10713 SuperSpeed Packet Connectivity 10-47 108 Suspend and Resume10-47 109 Hub Upstream Port Reset Behavior 10-47 1010 Hub Port Power Control 10-48 10101 Multiple Gangs10-48 1011 Hub Controller 10-49 10111 Endpoint Organization 10-49 10112 Hub Information Architecture and Operation 10-50 10113 Port Change Information Processing10-51 10114 Hub and Port Status Change Bitmap10-52 10115 Over-current Reporting and Recovery10-53 10116 Enumeration Handling 10-54 1012 Hub Configuration 10-54 1013 Descriptors 10-56 10131 Standard Descriptors for Hub Class 10-56 10132 Class-specific Descriptors 10-59 101321 Hub Descriptor 10-59 1014 Requests 10-61 10141 Standard Requests10-61 10142 Class-specific Requests 10-62 101421 Clear Hub Feature10-64 101422 Clear Port Feature10-64 101423 Get Hub Descriptor 10-65 101424 Get Hub Status10-65 101425 Get Port Error Count 10-67 101426 Get Port Status10-67 1014261 Port Status Bits10-68 PORT_CONNECTION10-69 PORT_ENABLE10-69 PORT_OVER_CURRENT10-69 PORT_RESET10-70 PORT_LINK_STATE 10-70 PORT_POWER 10-70 PORT_SPEED10-70 1014262 Port Status Change Bits 10-70 C_PORT_CONNECTION10-72 C_PORT_OVER_CURRENT10-72 C_PORT_RESET 10-72 C_PORT_BH_RESET 10-72 C_PORT_LINK_STATE10-72 C_PORT_CONFIG_ERROR 10-72 101427 Set Hub Descriptor10-73 101428 Set Hub Feature10-73 101429 Set Hub Depth10-73 Universal Serial Bus 30 Specification, Revision 10 xx 1014210 Set Port Feature10-74 1015 Host Root (Downstream) Ports 10-77 1016 Peripheral Device Upstream Ports 10-78 10161 Peripheral Device Upstream Ports 10-78 10162 Peripheral Device Connect State Machine 10-78 101621 PCONNECTPowered-off10-79 101622 PCONNECTAttempt SS Connect 10-79 101623 PCONNECTConnected on SS10-79 101624 PCONNECTConnected on USB 20 10-80 101625 PCONNECTConnected on USB 20 and Attempting SS Connection 10-80 1017 Hub Chapter Parameters 10-81 11 Interoperability and Power Delivery 11-1 111 USB 30 Host Support for USB 20 11-1 112 USB 30 Hub Support for USB 20 11-2 113 USB 30 Device Support for USB 2011-2 114 Power Distribution 11-2 1141 Classes of Devices and Connections 11-3 11411 Self-powered Hubs11-4 114111 Over-current Protection 11-4 11412 Low-power Bus-powered Devices11-5 11413 High-power Bus-powered Devices11-5 11414 Self-powered Devices 11-6 1142 Steady-State Voltage Drop Budget11-6 1143 Power Control During Suspend/Resume11-8 1144 Dynamic Attach and Detach 11-9 11441 Inrush Current Limiting11-9 11442 Dynamic Detach11-10 1145 VBUS Electrical Characteristics11-10 1146 Powered-B Connector 11-10 1147 Wire Gauge Table11-11 A Symbol Encoding A-1 B Symbol ScramblingB-1 B1 Data Scrambling B-1 C Power ManagementC-1 C1 SuperSpeed Power Management Overview C-1 C11 Link Power Management C-1 C111 Summary of Link States C-2 C112 U0 – Link Active C-2 C113 U1 – Link Idle with Fast Exit C-2 C1131 U1 Entry C-2 C1132 Exiting the U1 State C-3 C114 U2 – Link Idle with Slow Exit C-4 C115 U3 – Link Suspend C-5 C12 Link Power Management for Downstream Ports C-6 C121 Link State Coordination and Management C-6 Contents xxi C122 Packet Deferring C-7 C123 Software Interface C-7 C13 Other Link Power Management Support Mechanisms C-8 C131 Packets Pending Flag C-8 C132 Support for Isochronous Transfers C-9 C133 Support for Interrupt Transfers C-9 C14 Device Power Management ...展开收缩
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