MIPI CSI2 RX 设计手册，该手册是MAX10 M50 EVAL kit Compatible MIPI D-phy V.1 physical layer using FPGA LVDS/LVCMOS IO and passive network 支持接收1920*1080——30fps_2lanes image from OV5640 in Raw8 format with 672Mbps rate each lanes ；it support Low level Protocol
The DS90CR287 transmitter converts 28 bits of • 20 to 85 MHz Shift Clock Support LVCMOS/LVTTL data into four LVDS (Low Voltage • 50% Duty Cycle on Receiver Output Clock Differential Signaling) data streams. A phase-locked • 2.5 / 0 ns Set & Hold Tim
LVDS用户手册第四版
National Semiconductor’s LVDS Owner’s Manual, frst published in spring 1997, has been the industry’s “go-to design guide” over the last decade. Te owner’s manual helped LVDS grow from the original IEEE 1596.3-1996 Standard for Low-Voltag
